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US5382539A
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Method for manufacturing a semiconductor device including nonvolatile memories
Assignee: Rohm Co Ltd
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Filing: 1992-08-26
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Granted: 1995-01-17
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Expires: 2012-08-26
Abstract
Abstract A method for manufacturing a semiconductor device having a diffusion region formed within a source. A one-conductivity type well is created in a semiconductor substrate, and marked off with field oxide layers. An insulating layer for holding charges is formed on a portion of the surface of the one-conductivity type well, onto which a conductive layer is applied. The insulating layer and the conductive layer are both etched to produce a memory charge storage and a control gate electrode, respectively. An opposite-conductivity type drain and source are formed in the one-conductivity type well. A one-conductivity type diffusion region is then formed within the opposite-conductivity type source, resulting in a memory cell having superior reliability.
Inventors
- 👤 Takashi Nakamura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:56
CPC Classifications
H; H10; H10B; H10B41/00; H10D; H10D30/00; H10D30/60; H10D30/69; H10D30/701
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
138 words
A method for manufacturing switch elements of a semiconductor device including nonvolatile memories comprising: creating a well region in a semiconductor substrate, said well region being of a one-conductivity type; forming field oxide layers at a boundary of said well region; forming an insulating layer for holding charges on a surface of said well region; said insulating layer for holding charges being a ferroelectric layer; forming a conductive layer on a surface of said insulating layer for holding charges; etching said insulating layer for holding charges and said conductive layer to form a memory charge storage and a control gate electrode respectively; forming a drain and a source in said well region, said drain and said source being of an opposite-conductivity type opposite said one-conductivity type; and forming a diffusion region of said one-conductivity type within said source.
Claim 2
Independent Claim
138 words
A method for manufacturing switch elements of a semiconductor device including nonvolatile memories comprising: creating a well region in a semiconductor substrate, said well region being of a one-conductivity type; forming field oxide layers at a boundary of said well region; forming an insulating layer for holding charges on a surface of said well region; said insulating layer for holding charges being a ferroelectric layer; forming a conductive layer on a surface of said insulating layer for holding charges; etching said insulating layer for holding charges and said conductive layer to form a memory charge storage and a control gate electrode respectively; forming a drain and a source in said well region, said drain and said source being of an opposite-conductivity type opposite said one-conductivity type; and forming a diffusion region of said one-conductivity type within said source.
Claim 3
Independent Claim
146 words
A method for manufacturing switch elements of a semiconductor device including nonvolatile memories comprising: creating a well region in a semiconductor substrate, said well region being of a one-conductivity type; forming field oxide layers at a boundary of said well region; forming an insulating layer for holding charges on a surface of said well region; said insulating layer for holding charges includes an oxide layer and a nitride layer on said oxide layer; forming a conductive layer on a surface of said insulating layer for holding charges; etching said insulating layer for holding charges and said conductive layer to form a memory charge storage and a control gate electrode respectively; forming a drain and a source in said well region, said drain and said source being of an opposite-conductivity type opposite said one-conductivity type; and forming a diffusion region of said one-conductivity type within said source.
Claim 4
Independent Claim
146 words
A method for manufacturing switch elements of a semiconductor device including nonvolatile memories comprising: creating a well region in a semiconductor substrate, said well region being of a one-conductivity type; forming field oxide layers at a boundary of said well region; forming an insulating layer for holding charges on a surface of said well region; said insulating layer for holding charges includes an oxide layer and a nitride layer on said oxide layer; forming a conductive layer on a surface of said insulating layer for holding charges; etching said insulating layer for holding charges and said conductive layer to form a memory charge storage and a control gate electrode respectively; forming a drain and a source in said well region, said drain and said source being of an opposite-conductivity type opposite said one-conductivity type; and forming a diffusion region of said one-conductivity type within said source.
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USPTO Annuity & Maintenance Windows
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| 3.5 Years (Year 4) | 1998-01-16 | 1998-07-18 | 1999-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-16 | 2002-07-18 | 2003-01-17 | $3760.00 | Window Closed / Lapsed |
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