Patent US5377404A successfully refreshed from Google Patents.
US5377404A
Expired / Lapsed
US
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Method for fabricating a multi-layer printed circuit board
Assignee: Individual
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Filing: 1993-12-10
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Granted: 1995-01-03
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Expires: 2013-12-10
Abstract
Abstract A method for fabricating at least one via or hole in a multi-layer printed circuit board comprises separately drilling the board layers, stacking and laminating the drilled board layers utilizing conformal mapping digital imaging in a computer, and then finish drilling the holes. The invention also provides a method for correcting artwork to compensate for lamination distortion.
Inventors
- 👤 N. Edward Berg
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-10 01:11
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4638; H05K3/0002; H05K3/0073; H05K3/0082; H05K1/00; H05K1/02; H05K1/0266; H05K1/0269; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/096; H05K2201/09818; H05K2201/09918; H05K2203/00; H05K2203/05; H05K2203/0548; H05K2203/0551; H05K2203/14; H05K2203/1476; H05K3/0008; H05K3/0011; H05K3/0044; H05K3/0047; Y; Y10; Y10S; Y10S29/00; Y10S29/012; Y10S408/00; Y10S408/704; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49155; Y10T29/53; Y10T29/53004; Y10T29/53009; Y10T29/53013
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
153 words
A method of ensuring via or hole registration in a multi-layer printed circuit board comprising the steps in sequence of: (a) forming and drilling at least one hole in a first board layer in at least one preselected position; (b) illuminating at least a portion of a surface of said first board layer with light; (c) detecting light passing through said at least one hole in said first board layer and determining the actual position of said at least one hole; (d) generating in a computer a computer image representative of said first board layer having said at least one hole in said actual position; and, (e) automatically adjusting said preselected position, by conformal mapping digital imaging techniques in said computer, so that said preselected position conforms to said actual position and using said adjusted preselected position to permit automatic formation and drilling of a next board layer without using a physical template.
Claim 2
Independent Claim
153 words
A method of ensuring via or hole registration in a multi-layer printed circuit board comprising the steps in sequence of: (a) forming and drilling at least one hole in a first board layer in at least one preselected position; (b) illuminating at least a portion of a surface of said first board layer with light; (c) detecting light passing through said at least one hole in said first board layer and determining the actual position of said at least one hole; (d) generating in a computer a computer image representative of said first board layer having said at least one hole in said actual position; and, (e) automatically adjusting said preselected position, by conformal mapping digital imaging techniques in said computer, so that said preselected position conforms to said actual position and using said adjusted preselected position to permit automatic formation and drilling of a next board layer without using a physical template.
Claim 3
Dependent Claim
18 words
A method according to claim 1, wherein said light is detected by means of a light receptor means.
Claim 4
Dependent Claim
29 words
A method according to claim 1, wherein said through-holes are undersized, and including the steps of stacking and laminating said board layers, and reaming said holes to finish size.
Claim 5
Dependent Claim
12 words
A method according to claim 1, wherein said light comprises visible light.
Claim 6
Dependent Claim
11 words
A method according to claim 1, wherein said light comprises x-radiation.
Claim 7
Dependent Claim
64 words
A method for forming at least one via or hole in a multi-layer printed circuit board, said multi-layer board including a plurality of separate circuit board layers, comprising the steps of: (a) forming holes in each of said plurality of separate board layers according to the method of claim 1; and (b) stacking and laminating said separate board layers to form a multi-layer board.
Claim 8
Dependent Claim
34 words
A method according to claim 6, wherein said holes formed in said separate board layers are undersized, and including the step of dressing out said holes to finish size following said stacking and laminating.
Claim 9
Independent Claim
169 words
A method of correcting for the effects of lamination distortion in the production of a multi-layer printed circuit board comprising the steps in sequence, of: (a) forming a first board layer having at least one fiducial mark in a preselected position; (b) subjecting said first board layer to laminating conditions; (c) illuminating at least a portion of a surface of said first board layer with light; (d) detecting light passing through or reflected from the illuminated surface of said first board and determining the actual position of said at least one fiducial mark; generating in a computer a computer image representative of said first board layer having said at least one mark in said actual position and determining any distortion to said first board layer that has occurred as a result of said laminating conditions; and (e) automatically adjusting formation of a next board layer by conforming said preselected position to said actual position by using conformal mapping techniques and accounting for said distortion, without using a physical template.
Claim 10
Independent Claim
169 words
A method of correcting for the effects of lamination distortion in the production of a multi-layer printed circuit board comprising the steps in sequence, of: (a) forming a first board layer having at least one fiducial mark in a preselected position; (b) subjecting said first board layer to laminating conditions; (c) illuminating at least a portion of a surface of said first board layer with light; (d) detecting light passing through or reflected from the illuminated surface of said first board and determining the actual position of said at least one fiducial mark; generating in a computer a computer image representative of said first board layer having said at least one mark in said actual position and determining any distortion to said first board layer that has occurred as a result of said laminating conditions; and (e) automatically adjusting formation of a next board layer by conforming said preselected position to said actual position by using conformal mapping techniques and accounting for said distortion, without using a physical template.
Claim 11
Dependent Claim
18 words
A method according to claim 8, wherein said light is detected by means of a light receptor means.
Claim 12
Dependent Claim
12 words
A method according to claim 8, wherein said light comprises visible light.
Claim 13
Dependent Claim
11 words
A method according to claim 8, wherein said light comprises x-radiation.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-01-02 | 1998-07-04 | 1999-01-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-02 | 2002-07-04 | 2003-01-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-02 | 2006-07-04 | 2007-01-03 | $7700.00 | Window Closed / Lapsed |