Adaptive photoreceptor including adaptive element for long-time-constant continuous adaptation with low offset and insensitivity to light

Claim 2

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: a MOS feedback transistor of a first conductivity type having a first source-drain region connected to a source of a first voltage potential, a gate, and a second source-drain region; a photodiode having a first terminal connected to said second source-drain region of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; an inverting amplifier having an input connected to said first terminal of said photodiode and an output connected to an output node; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 3

The adaptive photoreceptor semiconductor circuit of claim 1 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 4

The adaptive photoreceptor semiconductor circuit of claim 1 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 5

The adaptive photoreceptor semiconductor circuit of claim 1 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 6

The adaptive photoreceptor semiconductor circuit of claim 3, wherein said expansive adaptive element comprises: an isolated well structure of a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart doped regions having conductivity type opposite to that of said well disposed in said well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an MOS transistor, said gate connected to said first doped region.

Claim 7

The adaptive photoreceptor semiconductor circuit of claim 4, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated well structure comprising a collector region having a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body, said well structure connected to said driven node; a base region comprising a region of conductivity type opposite to that of said well structure disposed in said well; and an emitter region comprising a region having a conductivity type the same as that of said well disposed in said base region, said emitter region connected to said isolated node.

Claim 8

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: a MOS feedback transistor of a first conductivity type having a first source-drain region connected to a source of a first voltage potential, a gate, and a second source-drain region; a photodiode having a first terminal connected to said second source-drain region of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; a MOS amplifier transistor of a second conductivity type opposite to said first conductivity type having a source-drain region connected to said source of first voltage potential, a gate connected to a source of bias voltage potential, and a second source-drain region connected to an output node; a MOS amplifier transistor of said first conductivity type having a first source-drain region connected to said second source-drain region of said MOS amplifier transistor of a second conductivity type, a gate connected to the second source-drain region of said MOS feedback transistor, and a second source-drain region connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 9

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: a MOS feedback transistor of a first conductivity type having a first source-drain region connected to a source of a first voltage potential, a gate, and a second source-drain region; a photodiode having a first terminal connected to said second source-drain region of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; a MOS amplifier transistor of a second conductivity type opposite to said first conductivity type having a source-drain region connected to said source of first voltage potential, a gate connected to a source of bias voltage potential, and a second source-drain region connected to an output node; a MOS amplifier transistor of said first conductivity type having a first source-drain region connected to said second source-drain region of said MOS amplifier transistor of a second conductivity type, a gate connected to the second source-drain region of said MOS feedback transistor, and a second source-drain region connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 10

The adaptive photoreceptor semiconductor circuit of claim 7 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 11

The adaptive photoreceptor semiconductor circuit of claim 7 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 12

The adaptive photoreceptor semiconductor circuit of claim 7 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 13

The adaptive photoreceptor semiconductor circuit of claim 9, wherein said expansive adaptive element comprises: an isolated well structure of a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart doped regions having conductivity type opposite to that of said well disposed in said well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an MOS transistor, said gate connected to said first doped region.

Claim 14

The adaptive photoreceptor semiconductor circuit of claim 10, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated well structure comprising a collector region having a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body, said well structure connected to said driven node; a base region comprising a region of conductivity type opposite to that of said well structure disposed in said well; and an emitter region comprising a region having a conductivity type the same as that of said well disposed in said base region, said emitter region connected to said isolated node.

Claim 15

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: a MOS feedback transistor of a first conductivity type having a first source-drain region connected to a source of a first voltage potential, a gate, and a second source-drain region; a photodiode having a first terminal connected to said second source-drain region of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; a MOS amplifier transistor of a second conductivity type opposite to said first conductivity type having a source-drain region connected to said source of first voltage potential, a gate connected to a source of bias voltage potential, and a second source-drain region connected to an output node; a MOS cascode transistor of said first conductivity type having a first source-drain region connected to said output node and to said second source-drain region of said MOS amplifier transistor of said second conductivity type, a gate connected to a source of cascode voltage potential and a second source-drain region; a MOS amplifier transistor of said first conductivity type having a first source-drain region connected to said second source-drain region of said MOS cascode transistor, a gate connected to the second source-drain region of said MOS feedback transistor, and a second source-drain region connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 16

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: a MOS feedback transistor of a first conductivity type having a first source-drain region connected to a source of a first voltage potential, a gate, and a second source-drain region; a photodiode having a first terminal connected to said second source-drain region of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; a MOS amplifier transistor of a second conductivity type opposite to said first conductivity type having a source-drain region connected to said source of first voltage potential, a gate connected to a source of bias voltage potential, and a second source-drain region connected to an output node; a MOS cascode transistor of said first conductivity type having a first source-drain region connected to said output node and to said second source-drain region of said MOS amplifier transistor of said second conductivity type, a gate connected to a source of cascode voltage potential and a second source-drain region; a MOS amplifier transistor of said first conductivity type having a first source-drain region connected to said second source-drain region of said MOS cascode transistor, a gate connected to the second source-drain region of said MOS feedback transistor, and a second source-drain region connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 17

The adaptive photoreceptor semiconductor circuit of claim 13 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 18

The adaptive photoreceptor semiconductor circuit of claim 13 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 19

The adaptive photoreceptor semiconductor circuit of claim 13 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 20

The adaptive photoreceptor semiconductor circuit of claim 15, wherein said expansive adaptive element comprises: an isolated well structure of a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart doped regions having conductivity type opposite to that of said well disposed in said well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an MOS transistor, said gate connected to said first doped region.

Claim 21

The adaptive photoreceptor semiconductor circuit of claim 16, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated well structure comprising a collector region having a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body, said well structure connected to said driven node; a base region comprising a region of conductivity type opposite to that of said well structure disposed in said well; and an emitter region comprising a region having a conductivity type the same as that of said well disposed in said base region, said emitter region connected to said isolated node.

Claim 22

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a first terminal connected to said source of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; an inverting amplifier having an input connected to said first terminal of said photodiode and an output connected to an output node; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 23

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a first terminal connected to said source of said MOS feedback transistor and a second terminal connected to a source of a second voltage potential, said photodiode oriented so as to be reverse biased with respect to said sources of first and second voltage potential; an inverting amplifier having an input connected to said first terminal of said photodiode and an output connected to an output node; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 24

The adaptive photoreceptor semiconductor circuit of claim 19 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 25

The adaptive photoreceptor semiconductor circuit of claim 19 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 26

The adaptive photoreceptor semiconductor circuit of claim 19 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 27

The adaptive photoreceptor semiconductor circuit of claim 21, wherein said expansive adaptive element comprises: an isolated n-well structure disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart p-type doped regions disposed in said n-well structure, said first p-type region connected to said isolated node and said second p-type region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second p-type regions to form an MOS transistor, said gate connected to said first p-type doped region.

Claim 28

The adaptive photoreceptor semiconductor circuit of claim 22, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated n-well structure comprising a collector region, said n-well structure connected to said driven node; a p-type base region disposed in said n-well; and an n-type emitter region disposed in said base region, said emitter region connected to said isolated node.

Claim 29

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a p-type semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a cathode connected to said source of said N-Channel MOS feedback transistor and an anode connected to a source of a second voltage potential; a P-Channel MOS amplifier transistor having a source connected to said source of a first voltage potential, a gate connected to a source of bias voltage potential, and a drain connected to an output node; an N-Channel MOS amplifier transistor having a drain region connected to said drain of said P-Channel MOS amplifier transistor, a gate connected to the source of said N-Channel MOS feedback transistor, and a source connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said N-Channel MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 30

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a p-type semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a cathode connected to said source of said N-Channel MOS feedback transistor and an anode connected to a source of a second voltage potential; a P-Channel MOS amplifier transistor having a source connected to said source of a first voltage potential, a gate connected to a source of bias voltage potential, and a drain connected to an output node; an N-Channel MOS amplifier transistor having a drain region connected to said drain of said P-Channel MOS amplifier transistor, a gate connected to the source of said N-Channel MOS feedback transistor, and a source connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said N-Channel MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 31

The adaptive photoreceptor semiconductor circuit of claim 25 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 32

The adaptive photoreceptor semiconductor circuit of claim 25 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 33

The adaptive photoreceptor semiconductor circuit of claim 25 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 34

The adaptive photoreceptor semiconductor circuit of claim 27, wherein said expansive adaptive element comprises: an isolated n-well structure disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart p-type doped regions disposed in said n-well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said n-well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an N-Channel MOS transistor, said gate connected to said first p-type doped region.

Claim 35

The adaptive photoreceptor semiconductor circuit of claim 28, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated n-well structure disposed in said semiconductor body comprising a collector region and connected to said driven node; a base region comprising a p-type region disposed in said n-well; and an emitter region comprising an n-type region disposed in said base region, said emitter region connected to said isolated node.

Claim 36

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a p-type semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a cathode connected to said source of said N-Channel MOS feedback transistor and an anode connected to a source of a second voltage potential; a P-Channel MOS amplifier transistor having a source connected to said source of a first voltage potential, a gate connected to a source of bias voltage potential, and a drain connected to an output node; an N-Channel MOS cascode transistor having a drain connected to said output node and to said drain of said P-Channel MOS amplifier transistor, a gate connected to a source of cascode voltage potential and a source; an N-Channel MOS amplifier transistor having a drain region connected to said source of said N-Channel MOS cascode transistor, a gate connected to the source of said MOS feedback transistor, and a source connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said N-Channel MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 37

A low offset, light insensitive adaptive photoreceptor semiconductor circuit for long-time-constant continuous learning disposed in a p-type semiconductor body, including: an N-Channel MOS feedback transistor having a drain connected to a source of a first voltage potential, a gate, and a source; a photodiode having a cathode connected to said source of said N-Channel MOS feedback transistor and an anode connected to a source of a second voltage potential; a P-Channel MOS amplifier transistor having a source connected to said source of a first voltage potential, a gate connected to a source of bias voltage potential, and a drain connected to an output node; an N-Channel MOS cascode transistor having a drain connected to said output node and to said drain of said P-Channel MOS amplifier transistor, a gate connected to a source of cascode voltage potential and a source; an N-Channel MOS amplifier transistor having a drain region connected to said source of said N-Channel MOS cascode transistor, a gate connected to the source of said MOS feedback transistor, and a source connected to said source of second voltage potential; a light-insensitive adaptive element having a driven node connected to said output node and an isolated node connected to the gate of said N-Channel MOS feedback transistor; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said isolated node of said adaptive element.

Claim 38

The adaptive photoreceptor semiconductor circuit of claim 31 further including a second capacitor having a first plate connected to said isolated node of said adaptive element and a second plate connected to said output node.

Claim 39

The adaptive photoreceptor semiconductor circuit of claim 31 wherein said light-insensitive adaptive element comprises an expansive adaptive element.

Claim 40

The adaptive photoreceptor semiconductor circuit of claim 31 wherein said light-insensitive adaptive element comprises a compressive adaptive element.

Claim 41

The adaptive photoreceptor semiconductor circuit of claim 33, wherein said expansive adaptive element comprises: an isolated n-well structure disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart p-type doped regions disposed in said n-well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said n-well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an N-Channel MOS transistor, said gate connected to said first p-type doped region,

Claim 42

The adaptive photoreceptor semiconductor circuit of claim 34, wherein said compressive adaptive element comprises: a driven node; an isolated node; an isolated n-well structure disposed in said semiconductor body comprising a collector region and connected to said driven node; a base region comprising a p-type region disposed in said n-well; and an emitter region comprising an n-type region disposed in said base region, said emitter region connected to said isolated node.

Claim 43

An expansive adaptive element disposed in a semiconductor body comprising: an isolated well structure of a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart doped regions having conductivity type opposite to that of said well disposed in said well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an MOS transistor, said gate connected to said first doped region.

Claim 44

An expansive adaptive element disposed in a semiconductor body comprising: an isolated well structure of a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart doped regions having conductivity type opposite to that of said well disposed in said well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an MOS transistor, said gate connected to said first doped region.

Claim 45

A compressive adaptive element disposed in a semiconductor body comprising: a driven node; an isolated node; a well structure comprising a collector region having a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body, said well structure connected to said driven node; a base region comprising a region of conductivity type opposite to that of said well structure disposed in said well; an emitter region comprising a region having a conductivity type the same as that of said well disposed in said base region, said emitter region connected to said isolated node; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said emitter region, wherein said isolated node is at a floating potential.

Claim 46

A compressive adaptive element disposed in a semiconductor body comprising: a driven node; an isolated node; a well structure comprising a collector region having a conductivity type opposite the conductivity type of said semiconductor body disposed in said semiconductor body, said well structure connected to said driven node; a base region comprising a region of conductivity type opposite to that of said well structure disposed in said well; an emitter region comprising a region having a conductivity type the same as that of said well disposed in said base region, said emitter region connected to said isolated node; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said emitter region, wherein said isolated node is at a floating potential.

Claim 47

An expansive adaptive element disposed in a semiconductor body comprising: an isolated n-well structure disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart p-type doped regions disposed in said n-well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said n-well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an N-Channel MOS transistor, said gate connected to said first p-type doped region.

Claim 48

An expansive adaptive element disposed in a semiconductor body comprising: an isolated n-well structure disposed in said semiconductor body; a driven node; an isolated node; first and second spaced apart p-type doped regions disposed in said n-well structure, said first doped region connected to said isolated node and said second doped region connected to the bulk of said n-well and to said driven node; and a gate disposed over and insulated from said first and second doped regions to form an N-Channel MOS transistor, said gate connected to said first p-type doped region.

Claim 49

A compressive adaptive element disposed in a semiconductor body comprising: a driven node; an isolated node; an n-well structure disposed in said semiconductor body comprising a collector region and connected to said driven node; a base region comprising a p-type region disposed in said n-well; an emitter region comprising an n-type region disposed in said base region, said emitter region connected to said isolated node; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said emitter region, wherein said isolated node is at a floating potential.

Claim 50

A compressive adaptive element disposed in a semiconductor body comprising: a driven node; an isolated node; an n-well structure disposed in said semiconductor body comprising a collector region and connected to said driven node; a base region comprising a p-type region disposed in said n-well; an emitter region comprising an n-type region disposed in said base region, said emitter region connected to said isolated node; and a first capacitor having a first plate connected to a source of fixed voltage potential and a second plate connected to said emitter region, wherein said isolated node is at a floating potential.