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US5371477A
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US
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Linear amplifier
Assignee: Panasonic Holdings Corp
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Filing: 1992-08-05
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Granted: 1994-12-06
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Expires: 2012-08-05
Abstract
Abstract A linear amplifier has an input signal controller for controlling the level of an input signal to a field-effect transistor (FET) using a DC gate current measured by a gate current detector arranged between a gate bias terminal and a drain bias terminal of the FET and a nonlinear resistor whose resistance can be varied corresponding to an inter-terminal voltage between the gate and the drain of the FET, in which the voltage at the gate of the FET is adjusted to a rate such that a particular drain current which has been determined just before the starting of burst signal transmission corresponding to the level of a power output of the linear amplifier is obtained, and is maintained for a given period of time.
Inventors
- 👤 Hikaru Ikeda
- 👤 Toshio Ishizaki
- 👤 Hiroaki Kosugi
- 👤 Yoshishige Yoshikawa
- 👤 Kunihiko Kanazawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 07:01
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3036; H03G3/3042; H03G3/3047; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/193; H03F3/1935
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
96 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a current detecting circuit coupled to said gate terminal of said field-effect transistor for detecting a peak current of a gate current of said field-effect transistor; and a control means coupled to said current detecting circuit for controlling a level of said input signal according to said peak current of said gate current so as to prevent a flow of a positive gate current through said field-effect transistor.
Claim 2
Dependent Claim
96 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a current detecting circuit coupled to said gate terminal of said field-effect transistor for detecting a peak current of a gate current of said field-effect transistor; and a control means coupled to said current detecting circuit for controlling a level of said input signal according to said peak current of said gate current so as to prevent a flow of a positive gate current through said field-effect transistor.
Claim 3
Dependent Claim
33 words
A linear amplifier according to claim 1, wherein said control means comprises a gain controlling circuit coupled to said gate terminal of said field-effect transistor for controlling the level of said input signal.
Claim 4
Dependent Claim
38 words
A linear amplifier according to claim 1, wherein said control means comprises a level controlling circuit coupled to said gate terminal of said field-effect transistor for controlling the level of a baseband signal contained within said input signal.
Claim 5
Dependent Claim
106 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a voltage detecting circuit for detecting an inter-terminal voltage between said gate and drain terminals of said field-effect transistor; and a variable resistor interposed between said gate terminal and said drain terminal of said field-effect transistor and controlled by said inter-terminal voltage detected by said voltage detecting circuit, said variable resistor having a resistance which decreases with an increase of the inter-terminal voltage so as to maintain a phase of the amplified output signal at a constant value.
Claim 6
Dependent Claim
106 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a voltage detecting circuit for detecting an inter-terminal voltage between said gate and drain terminals of said field-effect transistor; and a variable resistor interposed between said gate terminal and said drain terminal of said field-effect transistor and controlled by said inter-terminal voltage detected by said voltage detecting circuit, said variable resistor having a resistance which decreases with an increase of the inter-terminal voltage so as to maintain a phase of the amplified output signal at a constant value.
Claim 7
Dependent Claim
107 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; an input level detecting circuit for detecting a level of said input signal; and a variable resistor interposed between said gate terminal and said drain terminal of said field-effect transistor and controlled by the level of said input signal detected by said input level detecting circuit, said variable resistor having a resistance which decreases with an increase of the level of said input signal so as to maintain a phase of the amplified output signal at a constant value.
Claim 8
Dependent Claim
107 words
A linear amplifier comprising: a field-effect transistor for amplifying an input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; an input level detecting circuit for detecting a level of said input signal; and a variable resistor interposed between said gate terminal and said drain terminal of said field-effect transistor and controlled by the level of said input signal detected by said input level detecting circuit, said variable resistor having a resistance which decreases with an increase of the level of said input signal so as to maintain a phase of the amplified output signal at a constant value.
Claim 9
Dependent Claim
153 words
A linear amplifier for amplifying an input signal which intermittently becomes a burst signal, comprising: a field-effect transistor for amplifying the input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a current detecting circuit for detecting a drain current of said field-effect transistor; an output power selector for selecting an output power of the linear amplifier; a current selector for setting a reference drain current corresponding said output Dower selected by said output power selector; a voltage controlling circuit coupled to said current detecting circuit, said current selector and said gate terminal of said field-effect transistor for adjusting a gate voltage of said field-effect transistor such that said drain current detected by said current detecting circuit becomes equal to said reference drain current just before a starting of the burst signal, and for maintaining the adjusted gate voltage for a given period of time.
Claim 10
Dependent Claim
153 words
A linear amplifier for amplifying an input signal which intermittently becomes a burst signal, comprising: a field-effect transistor for amplifying the input signal inputted to a gate terminal thereof to obtain an amplified signal at a drain terminal thereof; a current detecting circuit for detecting a drain current of said field-effect transistor; an output power selector for selecting an output power of the linear amplifier; a current selector for setting a reference drain current corresponding said output Dower selected by said output power selector; a voltage controlling circuit coupled to said current detecting circuit, said current selector and said gate terminal of said field-effect transistor for adjusting a gate voltage of said field-effect transistor such that said drain current detected by said current detecting circuit becomes equal to said reference drain current just before a starting of the burst signal, and for maintaining the adjusted gate voltage for a given period of time.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-12-05 | 1998-06-06 | 1998-12-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-12-05 | 2002-06-06 | 2002-12-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-12-05 | 2006-06-06 | 2006-12-06 | $7700.00 | Window Closed / Lapsed |