US5369052A
Expired / Lapsed
US
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Method of forming dual field oxide isolation
Assignee: Motorola Solutions Inc
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Filing: 1993-12-06
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Granted: 1994-11-29
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Expires: 2013-12-06
Abstract
Abstract Dual field oxide isolation (34 & 42) is formed by oxidizing through a portion (44) of a silicon nitride layer (30), through an exposed portion (43) of a remaining portion (18) of a masking layer (16), and through an exposed portion (42) of a buffer layer (28), all of which overlie isolation regions (22) of the silicon substrate (12). The different portions vary the diffusion rate of oxygen so that different field oxide thicknesses are created in a single field oxidation cycle. Therefore, integrated circuits having both low voltage densely packed devices and high voltage devices can be fabricated on the same circuit.
Inventors
- 👤 Prashant Kenkare
- 👤 James R. Pfiester
- 👤 Shih-Wei Sun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:49
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/10; H10W10/13; H10P; H10P14/00; H10P14/60; H10P14/61; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; Y; Y10; Y10S; Y10S148/00; Y10S148/116; Y10S438/00; Y10S438/981
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
228 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate, comprising the steps of: forming a buffer layer overlying the substrate; forming a first masking layer overlying the buffer layer; patterning the first masking layer to form a first exposed portion of the buffer layer, to leave a remaining portion of the first masking layer, and to define an isolation region of the substrate; forming a nitride layer overlying the remaining portion of the first masking layer and the first exposed portion of the buffer layer; forming a second masking layer overlying a portion of the nitride layer, wherein the second masking layer is patterned to form an exposed portion of the nitride layer; removing the exposed portion of the nitride layer to form a second exposed portion of the buffer layer and to form an exposed portion of the remaining portion of the first masking layer, wherein a remaining portion of the nitride layer is protected by the second masking layer; removing the second masking layer after the step of removing the exposed portion of the nitride layer; and oxidizing through the remaining portion of the nitride layer and through the second exposed portion of the buffer layer to form an oxidized layer having the dual field thickness electrical isolation structure in the isolation region of the substrate.
Claim 2
Independent Claim
228 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate, comprising the steps of: forming a buffer layer overlying the substrate; forming a first masking layer overlying the buffer layer; patterning the first masking layer to form a first exposed portion of the buffer layer, to leave a remaining portion of the first masking layer, and to define an isolation region of the substrate; forming a nitride layer overlying the remaining portion of the first masking layer and the first exposed portion of the buffer layer; forming a second masking layer overlying a portion of the nitride layer, wherein the second masking layer is patterned to form an exposed portion of the nitride layer; removing the exposed portion of the nitride layer to form a second exposed portion of the buffer layer and to form an exposed portion of the remaining portion of the first masking layer, wherein a remaining portion of the nitride layer is protected by the second masking layer; removing the second masking layer after the step of removing the exposed portion of the nitride layer; and oxidizing through the remaining portion of the nitride layer and through the second exposed portion of the buffer layer to form an oxidized layer having the dual field thickness electrical isolation structure in the isolation region of the substrate.
Claim 3
Dependent Claim
30 words
The method of claim 1, wherein the step of forming a buffer layer comprises forming a layer selected from a group of materials consisting of: silicon dioxide and polycrystalline silicon.
Claim 4
Dependent Claim
20 words
The method of claim 1, wherein the step of forming a first masking layer comprises forming a silicon nitride layer.
Claim 5
Dependent Claim
30 words
The method of claim 1, wherein the step of forming a nitride layer comprises depositing a layer selected from a group of materials consisting of: silicon nitride and silicon oxynitride.
Claim 6
Dependent Claim
35 words
The method of claim 1, wherein the step of forming a nitride layer comprises the steps of: depositing a layer of silicon dioxide; and nitriding the layer of silicon dioxide to form the nitride layer.
Claim 7
Dependent Claim
20 words
The method of claim 1, wherein the step of forming a second masking layer comprises depositing a layer of photoresist.
Claim 8
Independent Claim
294 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate, comprising the steps of: forming a first buffer layer overlying the substrate; forming a first masking layer overlying the first buffer layer; patterning the first masking layer to form an exposed portion of the first buffer layer, to leave a remaining portion of the first masking layer, and to define an isolation region of the substrate; etching the exposed portion of the first buffer layer to form a recess under an edge portion of the remaining portion of the first masking layer, to form an exposed portion of the semiconductor substrate, and to leave a remaining portion of the first buffer layer overlying the substrate; forming a second buffer layer overlying the exposed portion of the substrate; forming a nitride layer overlying the remaining portion of the first masking layer and the second buffer layer; forming a second masking layer overlying a portion of the nitride layer, wherein the second masking layer is patterned to form an exposed portion of the nitride layer; removing the exposed portion of the nitride layer to leave a remaining portion of the nitride layer, to form an exposed portion of the second buffer layer, and to form an exposed portion of the remaining portion of the first masking layer; removing the second masking layer after the step of removing the exposed portion of the nitride layer; and oxidizing through the remaining portion of the nitride layer and through the exposed portion of the second buffer layer and the exposed portion of the remaining portion of the first masking layer to form an oxidized layer having the dual field thickness electrical isolation structure in the isolation region of the substrate.
Claim 9
Independent Claim
294 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate, comprising the steps of: forming a first buffer layer overlying the substrate; forming a first masking layer overlying the first buffer layer; patterning the first masking layer to form an exposed portion of the first buffer layer, to leave a remaining portion of the first masking layer, and to define an isolation region of the substrate; etching the exposed portion of the first buffer layer to form a recess under an edge portion of the remaining portion of the first masking layer, to form an exposed portion of the semiconductor substrate, and to leave a remaining portion of the first buffer layer overlying the substrate; forming a second buffer layer overlying the exposed portion of the substrate; forming a nitride layer overlying the remaining portion of the first masking layer and the second buffer layer; forming a second masking layer overlying a portion of the nitride layer, wherein the second masking layer is patterned to form an exposed portion of the nitride layer; removing the exposed portion of the nitride layer to leave a remaining portion of the nitride layer, to form an exposed portion of the second buffer layer, and to form an exposed portion of the remaining portion of the first masking layer; removing the second masking layer after the step of removing the exposed portion of the nitride layer; and oxidizing through the remaining portion of the nitride layer and through the exposed portion of the second buffer layer and the exposed portion of the remaining portion of the first masking layer to form an oxidized layer having the dual field thickness electrical isolation structure in the isolation region of the substrate.
Claim 10
Dependent Claim
22 words
The method of claim 7 wherein the step of forming a second buffer layer comprises reoxidizing the exposed portion of the substrate.
Claim 11
Dependent Claim
33 words
The method of claim 7, wherein the step of forming a second buffer layer comprises forming a layer selected from a group of materials consisting of: silicon dioxide, silicon nitride, and silicon oxynitride.
Claim 12
Dependent Claim
30 words
The method of claim 7, wherein the step of forming a nitride layer comprises forming a layer selected from a group of materials consisting of: silicon nitride and silicon oxynitride.
Claim 13
Dependent Claim
35 words
The method of claim 7, wherein the step of forming a nitride layer comprises the steps of: depositing a layer of silicon dioxide; and nitriding the layer of silicon dioxide to form the nitride layer.
Claim 14
Dependent Claim
29 words
The method of claim 7, further comprising the steps of: removing the remaining portion of the first masking layer; and removing the remaining portion of the first buffer layer.
Claim 15
Dependent Claim
20 words
The method of claim 7, wherein the step of forming a second masking layer comprises depositing a layer of photoresist.
Claim 16
Independent Claim
235 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate comprising the steps of: forming a buffer layer overlying the substrate; forming a first silicon nitride layer overlying the buffer layer; patterning the first silicon nitride layer to form a first exposed portion of the buffer layer, to leave a remaining portion of the first silicon nitride layer, and to define an isolation region of the substrate; depositing a second silicon nitride layer overlying the remaining portion of the first silicon nitride layer and the first exposed portion of the buffer layer; depositing a photoresist layer overlying a portion of the second silicon nitride layer; patterning the photoresist layer to form an exposed portion of the second silicon nitride layer and to leave a patterned photoresist layer; etching the exposed portion of the second silicon nitride layer to form an exposed portion of the remaining portion of the first silicon nitride layer and to form a second exposed portion of the buffer layer, wherein a remaining portion of the second silicon nitride layer is protected by the patterned photoresist layer; etching the patterned photoresist layer; and oxidizing through the remaining portion of the second silicon nitride layer and through the second exposed portion of the buffer layer to form an oxidized layer having the dual field thickness isolation structure in the isolation region of the substrate.
Claim 17
Independent Claim
235 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate comprising the steps of: forming a buffer layer overlying the substrate; forming a first silicon nitride layer overlying the buffer layer; patterning the first silicon nitride layer to form a first exposed portion of the buffer layer, to leave a remaining portion of the first silicon nitride layer, and to define an isolation region of the substrate; depositing a second silicon nitride layer overlying the remaining portion of the first silicon nitride layer and the first exposed portion of the buffer layer; depositing a photoresist layer overlying a portion of the second silicon nitride layer; patterning the photoresist layer to form an exposed portion of the second silicon nitride layer and to leave a patterned photoresist layer; etching the exposed portion of the second silicon nitride layer to form an exposed portion of the remaining portion of the first silicon nitride layer and to form a second exposed portion of the buffer layer, wherein a remaining portion of the second silicon nitride layer is protected by the patterned photoresist layer; etching the patterned photoresist layer; and oxidizing through the remaining portion of the second silicon nitride layer and through the second exposed portion of the buffer layer to form an oxidized layer having the dual field thickness isolation structure in the isolation region of the substrate.
Claim 18
Dependent Claim
30 words
The method of claim 14, wherein the step of forming a buffer layer comprises forming a layer selected from a group of materials consisting of: silicon dioxide and polycrystalline silicon.
Claim 19
Dependent Claim
32 words
The method of claim 14, wherein the step of depositing a second silicon nitride layer is further characterized as depositing the silicon nitride layer with a thickness of less than 30 nanometers.
Claim 20
Dependent Claim
25 words
The method of claim 14, further comprising the steps of: removing the remaining portion of the first silicon nitride layer; and removing the buffer layer.
Claim 21
Independent Claim
309 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate comprising the steps of: forming a silicon dioxide layer overlying the substrate; forming a first silicon nitride layer overlying the silicon dioxide layer; patterning the first silicon nitride layer to form a first exposed portion of the silicon dioxide layer, to leave a remaining portion of the first silicon nitride layer, and to define an isolation region of the substrate; etching the exposed portion of the silicon dioxide layer to form a recess under an edge portion of the remaining portion of the first silicon nitride layer, to form an exposed portion of the substrate, and to leave a remaining portion of the silicon dioxide layer overlying the substrate; forming a buffer layer having a thickness of less than 30 nanometers overlying the exposed portion of the substrate; depositing a second silicon nitride layer overlying the remaining portion of the first silicon nitride layer and the buffer layer; depositing a photoresist layer overlying a portion of the second silicon nitride layer; patterning the photoresist layer to form an exposed portion of the second silicon nitride layer and to leave a patterned photoresist layer; etching the exposed portion of the second silicon nitride layer to leave a remaining portion of the second silicon nitride layer, to form an exposed portion of the remaining portion of the first silicon nitride layer, and to form an exposed portion of the buffer layer; etching the patterned photoresist layer; and oxidizing through the remaining portion of the second silicon nitride layer and through the exposed portion of the buffer layer and the exposed portion of the remaining portion of the first silicon nitride layer to form an oxidized layer having a dual field thickness which forms electrical isolation in the isolation region of the substrate.
Claim 22
Independent Claim
309 words
A method for forming a dual field thickness isolation structure in an integrated circuit device on a semiconductor substrate comprising the steps of: forming a silicon dioxide layer overlying the substrate; forming a first silicon nitride layer overlying the silicon dioxide layer; patterning the first silicon nitride layer to form a first exposed portion of the silicon dioxide layer, to leave a remaining portion of the first silicon nitride layer, and to define an isolation region of the substrate; etching the exposed portion of the silicon dioxide layer to form a recess under an edge portion of the remaining portion of the first silicon nitride layer, to form an exposed portion of the substrate, and to leave a remaining portion of the silicon dioxide layer overlying the substrate; forming a buffer layer having a thickness of less than 30 nanometers overlying the exposed portion of the substrate; depositing a second silicon nitride layer overlying the remaining portion of the first silicon nitride layer and the buffer layer; depositing a photoresist layer overlying a portion of the second silicon nitride layer; patterning the photoresist layer to form an exposed portion of the second silicon nitride layer and to leave a patterned photoresist layer; etching the exposed portion of the second silicon nitride layer to leave a remaining portion of the second silicon nitride layer, to form an exposed portion of the remaining portion of the first silicon nitride layer, and to form an exposed portion of the buffer layer; etching the patterned photoresist layer; and oxidizing through the remaining portion of the second silicon nitride layer and through the exposed portion of the buffer layer and the exposed portion of the remaining portion of the first silicon nitride layer to form an oxidized layer having a dual field thickness which forms electrical isolation in the isolation region of the substrate.
Claim 23
Dependent Claim
37 words
The method of claim 18, wherein the step of forming a buffer layer comprises a process selected from a group consisting of: reoxidizing the exposed portion of the substrate; and nitriding the exposed portion of the substrate.
Claim 24
Dependent Claim
30 words
The method of claim 18, further comprising the steps of: removing the remaining portion of the first silicon nitride layer; and removing the remaining portion of the silicon dioxide layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-28 | 1998-05-30 | 1998-11-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-28 | 2002-05-30 | 2002-11-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-28 | 2006-05-30 | 2006-11-29 | $7700.00 | Window Closed / Lapsed |