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US5365514A Expired / Lapsed US ⏱️ 0.0 years remaining

Event driven interface for a system for monitoring and controlling a data communications network

Assignee: International Business Machines Corp
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Filing: 1993-03-01
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Granted: 1994-11-15
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Expires: 2013-03-01
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Abstract

Abstract An Event Driven Interface (EDI) is disclosed for use as a subsystem of a monitoring and control system for a data communications network. The network communicates a serial stream of binary bits having a characteristic pattern. The system includes a control vector generator for generating a control vector C(i) which describes the characteristic pattern and an event vector analyzer for analyzing an event vector E(i) which represents a plurality of occurrences of the pattern on the network.

Inventors

  • 👤 Paul C. Hershey
  • 👤 Kenneth J. Barker
  • 👤 Charles S. Lingafelt, Sr.
  • 👤 John G. Waclawsky

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:04
CPC Classifications
H; H04; H04L; H04L43/00

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 283 words
In a system which communicates a serial data stream having a characteristic pattern, said system including a control vector source for providing a control vector which describes said characteristic pattern and an event vector expert for analyzing an event vector which represents a plurality of occurrences of said pattern an Event Driven Interface, comprising: an n-bit address register having a first portion with n-1 bits and an second portion with one bit and an input to said second portion coupled to said data stream, for receiving a bit from said serial data stream, where n is a positive integer; an addressable memory having a plurality of data storage locations, each having a first portion with n-1 bits and a second portion with m bits, said memory having an n-bit address input coupled an output of said address register and having a data input coupled to said control vector source, for receiving said control vector to configure data stored in first and second ones of said data storage locations to represent a digital filter for said pattern, where m is a positive integer or zero; a feedback path from an output of said memory to an input of said register, for transferring said data from said first portion of said first one of said data storage locations in said memory to said first portion of said address register, for concatenation with said bit from said serial data stream to form an address for accessing said second one of said data storage locations of said memory; a counter coupled to an output of said memory, for counting when said second one of said data storage locations in said memory is accessed, forming said event vector.
Claim 2
Dependent Claim 283 words
In a system which communicates a serial data stream having a characteristic pattern, said system including a control vector source for providing a control vector which describes said characteristic pattern and an event vector expert for analyzing an event vector which represents a plurality of occurrences of said pattern an Event Driven Interface, comprising: an n-bit address register having a first portion with n-1 bits and an second portion with one bit and an input to said second portion coupled to said data stream, for receiving a bit from said serial data stream, where n is a positive integer; an addressable memory having a plurality of data storage locations, each having a first portion with n-1 bits and a second portion with m bits, said memory having an n-bit address input coupled an output of said address register and having a data input coupled to said control vector source, for receiving said control vector to configure data stored in first and second ones of said data storage locations to represent a digital filter for said pattern, where m is a positive integer or zero; a feedback path from an output of said memory to an input of said register, for transferring said data from said first portion of said first one of said data storage locations in said memory to said first portion of said address register, for concatenation with said bit from said serial data stream to form an address for accessing said second one of said data storage locations of said memory; a counter coupled to an output of said memory, for counting when said second one of said data storage locations in said memory is accessed, forming said event vector.
Claim 3
Dependent Claim 15 words
The system of claim 1, wherein said serial data stream is a token ring network.
Claim 4
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is a FDDI network.
Claim 5
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is an Ethernet network.
Claim 6
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is a SNA network.
Claim 7
Dependent Claim 15 words
The system of claim 1, wherein said serial data stream is a TCP IP network.
Claim 8
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is a SONET network.
Claim 9
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is a ATM network.
Claim 10
Dependent Claim 15 words
The system of claim 1, wherein said serial data stream is from a disk head.
Claim 11
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is from a modem.
Claim 12
Dependent Claim 15 words
The system of claim 1, wherein said serial data stream is from a TP line.
Claim 13
Dependent Claim 12 words
The system of claim 1, wherein said serial data stream is text.
Claim 14
Dependent Claim 13 words
The system of claim 1, wherein said serial data stream is channel data.
Claim 15
Dependent Claim 14 words
The system of claim 1, wherein said serial data stream is telephone dialing pulses.
Claim 16
Dependent Claim 13 words
The system of claim 1, wherein said serial data stream is printer data.
Claim 17
Dependent Claim 285 words
In a system for which communicates a serial data stream having a characteristic pattern, said system including a control vector source for providing a control vector which describes said characteristic pattern and an event vector expert for analyzing an event vector which represents a plurality of occurrences of said pattern, a method for generating said event vectors, comprising the steps of: receiving a bit from said serial data stream in an n-bit address register having a first portion with n-1 bits and an second portion with one bit and an input to said second portion coupled to said data stream, where n is a positive integer; receiving said control vector to configure data stored in first and second ones of data storage locations to represent a digital filter for said pattern, in an addressable memory having a plurality of data storage locations, each having a first portion with n-1 bits and a second portion with m bits, said memory having an n-bit address input coupled an output of said address register and having a data input coupled to said control vector source, where m is a positive integer or zero; transferring said data from said first portion of said first one of said data storage locations in said memory to said first portion of said address register over a feedback path from an output of said memory to an Input of said register; concatenating said data from said feedback path with said bit from said serial data stream to form an address for accessing said second one of said data storage locations of said memory; forming said event vector by counting when said second one of said data storage locations in said memory is accessed.
Claim 18
Dependent Claim 285 words
In a system for which communicates a serial data stream having a characteristic pattern, said system including a control vector source for providing a control vector which describes said characteristic pattern and an event vector expert for analyzing an event vector which represents a plurality of occurrences of said pattern, a method for generating said event vectors, comprising the steps of: receiving a bit from said serial data stream in an n-bit address register having a first portion with n-1 bits and an second portion with one bit and an input to said second portion coupled to said data stream, where n is a positive integer; receiving said control vector to configure data stored in first and second ones of data storage locations to represent a digital filter for said pattern, in an addressable memory having a plurality of data storage locations, each having a first portion with n-1 bits and a second portion with m bits, said memory having an n-bit address input coupled an output of said address register and having a data input coupled to said control vector source, where m is a positive integer or zero; transferring said data from said first portion of said first one of said data storage locations in said memory to said first portion of said address register over a feedback path from an output of said memory to an Input of said register; concatenating said data from said feedback path with said bit from said serial data stream to form an address for accessing said second one of said data storage locations of said memory; forming said event vector by counting when said second one of said data storage locations in said memory is accessed.
Claim 19
Dependent Claim 15 words
The method of claim 16, wherein said serial data stream is a token ring network.
Claim 20
Dependent Claim 14 words
The method of claim 16, wherein said serial data stream is a FDDI network.
Claim 21
Dependent Claim 14 words
The method of claim 16, wherein said serial data stream is an Ethernet network.
Claim 22
Independent Claim 14 words
The method of claims 16, wherein said serial data stream is a SNA network.
Claim 23
Dependent Claim 15 words
The method of claim 16, wherein said serial data stream is a TCP IP network.
Claim 24
Dependent Claim 14 words
The method of claim 16, wherein said serial data stream is a SONET network.
Claim 25
Dependent Claim 14 words
The method of claim 16, wherein said serial data stream is an ATM network.
Claim 26
Dependent Claim 15 words
The system of claim 16, wherein said serial data stream is from a disk head.
Claim 27
Dependent Claim 14 words
The system of claim 16, wherein said serial data stream is from a modem.
Claim 28
Dependent Claim 15 words
The system of claim 16, wherein said serial data stream is from a TP line.
Claim 29
Dependent Claim 12 words
The system of claim 16, wherein said serial data stream is text.
Claim 30
Dependent Claim 13 words
The system of claim 16, wherein said serial data stream is channel data.
Claim 31
Dependent Claim 14 words
The system of claim 16, wherein said serial data stream is telephone dialing pulses.
Claim 32
Dependent Claim 13 words
The system of claim 16, wherein said serial data stream is printer data.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-11-14 1998-05-16 1998-11-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-11-14 2002-05-16 2002-11-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-11-14 2006-05-16 2006-11-15 $7700.00 Window Closed / Lapsed

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