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Patent US5364818A successfully refreshed from Google Patents.
US5364818A
Expired / Lapsed
US
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Sog with moisture resistant protective capping layer
Assignee: Teledyne Digital Imaging Inc
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Filing: 1991-05-28
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Granted: 1994-11-15
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Expires: 2011-05-28
Abstract
Abstract PCT No. PCT/CA91/00177 Sec. 371 Date Jan. 26, 1993 Sec. 102(e) Date Jan. 26, 1993 PCT Filed May 28, 1991 PCT Pub. No. WO91/19317 PCT Pub. Date Dec. 12, 1991.A method of planarizing a semiconductor wafer having interconnect tracks of formed thereon, comprises applying a layer of inorganic spin-on glass to the wafer, curing the spin-on glass at a temperature not exceeding about 450 DEG C., then placing the wafer in a dielectric deposition chamber, subjecting the wafer to in situ disconnection and outgassing of water and reaction by-products, and then capping the wafer in a moisture-free environment with a protective dielectric layer resistant to moisture diffusion.
Inventors
- 👤 Luc Ouellet
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:01
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/66; H10P14/665; H10P14/63; H10P14/6326; H10P14/6342; H10P14/65; H10P14/6516; H10P14/6529; H10P14/6548; H10P95/00; H10P95/06; H10P95/08; H10W; H10W20/00; H10W20/01; H10W20/071; H10W74/00; H10W74/10; H10W74/131; H10W74/137; H10W74/40; H10W74/43; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; H10P14/6923; Y; Y10; Y10S; Y10S438/00; Y10S438/902
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
78 words
A method of planarizing a semiconductor wafer having interconnect tracks metal of formed thereon, comprising applying a layer of inorganic spin-on glass to the wafer, curing said spin-on glass at a temperature not exceeding about 450° C., then placing the wafer in a dielectric deposition chamber, subjecting the wafer to in situ disconnection and outgassing of water and reaction by-products, and then capping the wafer in a moisture-free environment with a protective dielectric layer resistant to moisture diffusion.
Claim 2
Independent Claim
78 words
A method of planarizing a semiconductor wafer having interconnect tracks metal of formed thereon, comprising applying a layer of inorganic spin-on glass to the wafer, curing said spin-on glass at a temperature not exceeding about 450° C., then placing the wafer in a dielectric deposition chamber, subjecting the wafer to in situ disconnection and outgassing of water and reaction by-products, and then capping the wafer in a moisture-free environment with a protective dielectric layer resistant to moisture diffusion.
Claim 3
Dependent Claim
12 words
A method as claimed in claim 1, wherein said metal is aluminum.
Claim 4
Dependent Claim
14 words
A method as claimed in claim 1, wherein the SOG is a phosphorus-alloyed SOG.
Claim 5
Dependent Claim
103 words
A method as claimed in claim 1, wherein that said dielectric capping layer is selected from the group consisting of: phosphosilicate glass; Borosilicate glass, Si w O x B y H z ; Arsenosilicate glass, Si w O x As y H z ; Lead silicated glass, Si w O x Pb y H z ; Silicon nitride, Si x N y H z ; Silicon oxynitride, Si w N x O y H z ; Fluorinated silicon nitride, Si w N x F y H z ; and Florinated silicon oxynitride, Si v N w O x F y H z .
Claim 6
Dependent Claim
153 words
A method as claimed in claim 1, wherein it the wafer is fabricated in the following manner: a) a first layer of interconnect metal is deposited on the wafer; b) said first layer is etched to leave the desired interconnect track pattern; c) a first layer of dielectric is deposited over the etched interconnect tracks; d) one or more layers of spin-on glass is applied over the first layer of dielectric to planarize said first dielectric layer; e) disconnection and outgassing of water and its by-products is performed; d) a protective, moisture diffusion resistant dielectric capping layer is deposited; e) contact holes are opened through the deposited layers to reach the first interconnect layer while the wafers are held in a moisture-free environment to prevent water pick-up through these holes; f) a second layer of interconnect metal is applied; and g) the second layer of interconnect metal is etched in the desired pattern.
Claim 7
Dependent Claim
25 words
A method as claimed in claim 5, wherein after application of the SOG layer the wafer is subjected to a forming gas at atmosphere pressure.
Claim 8
Dependent Claim
20 words
A method as claimed in claim 6 wherein said forming gas is a mixture of nitrogen and about 10% hydrogen.
Claim 9
Dependent Claim
32 words
A method as claimed in claim 5, wherein a second outgassing is performed after the opening of said contact holes and prior to the application of said second layer of interconnect metal.
Claim 10
Dependent Claim
24 words
A method as claimed in claim 5, wherein gettering is carried out on the wafer after etching of the second layer of interconnect metal.
Claim 11
Dependent Claim
20 words
A method as claimed in claim 5, wherein the outgassing is carried out in-situ in a batch dielectric deposition system.
Claim 12
Dependent Claim
28 words
A method as claimed in claim 5, wherein the outgassing is carried out in a batch outgassing station attached to an in-situ single wafer or batch deposition system.
References Cited (Backward Citations)
JPS61180458A
Cited
JPS63155625A
Cited
JPS6464340A
Cited
JPH02152258A
Cited
WO1991009422A1
Cited
JPH04199625A
Cited
US5252515A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-14 | 1998-05-16 | 1998-11-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-14 | 2002-05-16 | 2002-11-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-14 | 2006-05-16 | 2006-11-15 | $7700.00 | Window Closed / Lapsed |