US5362632A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Barrier process for Ta2 O5 capacitor
Assignee: Round Rock Research LLC
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Filing: 1994-02-08
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Granted: 1994-11-08
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Expires: 2014-02-08
Abstract
Abstract The method of the present invention introduces a fabrication method for forming a storage capacitor on a supporting silicon substrate of a semiconductor device, by the steps of: forming a bottom capacitor electrode comprising conductively doped polysilicon; forming an insulating layer over the bottom electrode via a first rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); forming a capacitor dielectric material comprising tantalum oxide (Ta 2 O 5 ) over the insulating layer; forming a semiconductive layer comprising polysilicon over the capacitor dielectric material; converting the semiconductive layer into a reaction prevention barrier by subjecting the semiconductive layer to a second rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); and forming a top capacitor conductive electrode comprising titanium nitride (TiN) over the reaction prevention barrier.
Inventors
- 👤 Viju K. Mathews
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:54
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
77 words
A method for forming an reaction prevention barrier between a first conductive layer and a tantalum oxide layer on a supporting substrate of a semiconductor device, said method comprising the steps of: forming said tantalum oxide layer; forming a semiconductive layer over said tantalum oxide layer; converting said semiconductive layer into said reaction prevention barrier by subjecting said semiconductive layer to a rapid thermal processing (RTP) step; and forming said conductive material over said reaction prevention barrier.
Claim 2
Independent Claim
77 words
A method for forming an reaction prevention barrier between a first conductive layer and a tantalum oxide layer on a supporting substrate of a semiconductor device, said method comprising the steps of: forming said tantalum oxide layer; forming a semiconductive layer over said tantalum oxide layer; converting said semiconductive layer into said reaction prevention barrier by subjecting said semiconductive layer to a rapid thermal processing (RTP) step; and forming said conductive material over said reaction prevention barrier.
Claim 3
Dependent Claim
16 words
The method as recited in claim 1, wherein said supporting substrate comprises a second conductive layer.
Claim 4
Dependent Claim
19 words
The method as recited in claim 2, wherein said supporting substrate further comprises an insulator overlying said conductive layer.
Claim 5
Dependent Claim
19 words
The method as recited in claim 3, wherein said reaction prevent barrier is a rapid thermally processed silicon nitride.
Claim 6
Dependent Claim
23 words
The method as recited in claim 1, wherein said first conductive layer and said tantalum oxide layer are chemically reactive with one another.
Claim 7
Dependent Claim
30 words
The method as recited in claim 1, wherein said conductive material comprises a conductive material selected from the group consisting of a refractory metal nitride, conductively doped polysilicon and metals.
Claim 8
Dependent Claim
16 words
The method as recited in claim 6, wherein said refractory metal nitride is titanium nitride (TiN).
Claim 9
Independent Claim
95 words
A method for forming a capacitor on a supporting substrate of a semiconductor device, said method comprising the steps of: forming a bottom capacitor conductive electrode; forming an insulator over said bottom electrode via a first rapid thermal processing step (RTP); forming tantalum oxide layer as capacitor dielectric over said first RTP layer; forming a semiconductive layer over said tantalum oxide layer; converting said semiconductive layer into a reaction prevention barrier by subjecting said semiconductive layer to a second rapid thermal processing step; and forming a top capacitor conductive electrode over said reaction prevent barrier.
Claim 10
Independent Claim
95 words
A method for forming a capacitor on a supporting substrate of a semiconductor device, said method comprising the steps of: forming a bottom capacitor conductive electrode; forming an insulator over said bottom electrode via a first rapid thermal processing step (RTP); forming tantalum oxide layer as capacitor dielectric over said first RTP layer; forming a semiconductive layer over said tantalum oxide layer; converting said semiconductive layer into a reaction prevention barrier by subjecting said semiconductive layer to a second rapid thermal processing step; and forming a top capacitor conductive electrode over said reaction prevent barrier.
Claim 11
Dependent Claim
15 words
The method as recited in claim 8, wherein said supporting substrate comprises a silicon substrate.
Claim 12
Dependent Claim
15 words
The method as recited in claim 8, wherein said bottom electrode comprises conductively doped polysilicon.
Claim 13
Dependent Claim
21 words
The method as recited in claim 8, wherein said tantalum oxide layers is a material that is chemically reactive with polysilicon.
Claim 14
Dependent Claim
13 words
The method as recited in claim 8, wherein said semiconductive layer is polysilicon.
Claim 15
Dependent Claim
20 words
The method as recited in claim 8, wherein said first and second RTP steps form rapid thermal silicon nitride (RTN).
Claim 16
Dependent Claim
29 words
The method as recited in claim 8, wherein said top electrode comprises a conductive material selected from the group consisting a refractory metal nitride, conductively doped polysilicon and metals.
Claim 17
Dependent Claim
16 words
The method as recited in claim 14, wherein said refractory metal nitride is titanium nitride (TiN).
Claim 18
Independent Claim
125 words
A method for forming a storage capacitor on a supporting silicon substrate of a semiconductor device, said method comprising the steps of: forming a bottom capacitor electrode comprising conductively doped polysilicon; forming an insulating layer over said bottom electrode via a first rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); forming a capacitor dielectric material comprising tantalum oxide (Ta 2 O 5 ) over said insulating layer; forming a semiconductive layer comprising polysilicon over said capacitor dielectric material; converting said semiconductive layer into a reaction prevention barrier by subjecting said semiconductive layer to a second rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); and forming a top capacitor conductive electrode comprising titanium nitride (TiN) over said reaction prevention barrier.
Claim 19
Independent Claim
125 words
A method for forming a storage capacitor on a supporting silicon substrate of a semiconductor device, said method comprising the steps of: forming a bottom capacitor electrode comprising conductively doped polysilicon; forming an insulating layer over said bottom electrode via a first rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); forming a capacitor dielectric material comprising tantalum oxide (Ta 2 O 5 ) over said insulating layer; forming a semiconductive layer comprising polysilicon over said capacitor dielectric material; converting said semiconductive layer into a reaction prevention barrier by subjecting said semiconductive layer to a second rapid thermal processing step (RTP) using rapid thermal silicon nitride (RTN); and forming a top capacitor conductive electrode comprising titanium nitride (TiN) over said reaction prevention barrier.
References Cited (Backward Citations)
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| 3.5 Years (Year 4) | 1997-11-07 | 1998-05-09 | 1998-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-07 | 2002-05-09 | 2002-11-08 | $3760.00 | Window Closed / Lapsed |
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