Phase locked loop frequency synthesizer

Claim 1

A phase-locked loop frequency synthesizer comprising: voltage-controlled oscillator means for producing an output voltage signal having a controlled frequency in accordance with a control voltage input thereto; dual modulus prescaler means, electrically coupled to said voltage-controlled oscillator means, for receiving and dividing the output voltage signal from said voltage-controlled oscillator means to produce a divided signal; pulse swallow counter means, electrically coupled to said dual modulus prescaler means, for receiving and dividing the divided signal provided by said dual modulus prescaler means according to a division number specified by a supplied signal to produce a second divided output signal; phase detector means, electrically coupled to said pulse swallow counter means, for comparing a phase of the second divided output signal provided by said pulse swallow counter means with a phase of a reference signal provided by a reference frequency oscillator and generating a voltage signal according to a phase difference therebetween; active filter means, electrically coupled to said phase detector means, for receiving and smoothing the voltage signal provided by said phase detector means and supplying the smoothed voltage signal as said control voltage to said voltage controlled oscillator means; and power-saving control means, electrically coupled to said pulse swallow counter means and said dual modulus prescaler means, for setting, during a power saving operation, a modulus control input terminal of said dual modulus prescaler means to an inactive state by electrically disconnecting said pulse swallow counter means from said dual modulus prescaler means.