US5045813A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Slip phase control PLL
Assignee: Nihon Musen KK
•
Filing: 1990-02-21
•
Granted: 1991-09-03
•
Expires: 2010-02-21
Abstract
Abstract A slip phase control phase-locked loop includes a voltage-controlled oscillator for generating a frequency signal, and a binary programmable frequency divider for producing a frequency-divided signal in response to the frequency signal supplied thereto, the binary programmable frequency divider including a 2-scale-factor prescaler, a swallow counter, and a main counter. The phase of the frequency-divided signal is compared with the phase of a reference frequency signal. A phase-compared signal is integrated and the integrated signal is applied to the voltage-controlled oscillator. A D/A converter swallow counter and a D/A converter counter are operable with the binary programmable frequency divider for D/A-converting a signal derived from the frequency signal into a pulse-width-modulated signal corresponding to the phase-compared signal at a present count ranging from 0 to 2 M -1, where M is a positive integer.
Inventors
- 👤 Kazuo Yamashita
- 👤 Akiharu Inoue
- 👤 Masahiko Egawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 01:45
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/193
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
165 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating said phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and D/A converting means having a D/A converter swallow counter and a D/A converter main counter and operable with said binary programmable frequency dividing means for D/A-converting a signal derived from said frequency signal into a pulse-width-modulated signal corresponding to said phase-compared signal at a preset count ranging from 0 to 2 M -1, where M is a positive integer.
Claim 2
Dependent Claim
165 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating said phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and D/A converting means having a D/A converter swallow counter and a D/A converter main counter and operable with said binary programmable frequency dividing means for D/A-converting a signal derived from said frequency signal into a pulse-width-modulated signal corresponding to said phase-compared signal at a preset count ranging from 0 to 2 M -1, where M is a positive integer.
Claim 3
Dependent Claim
42 words
The slip phase control phase-locked loop of claim 1, wherein said swallow counter and said main counter of said binary programmable frequency dividing means are both coupled to receive an output of said 2-scale-factor prescaler of said binary programmable frequency dividing means.
Claim 4
Dependent Claim
39 words
The slip phase control phase-locked loop of claim 2, wherein said D/A converter swallow counter and said D/A converter main counter are both coupled to receive an output of said 2-scale-factor prescaler of said binary programmable frequency dividing means.
Claim 5
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 5, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
Claim 6
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 2, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
Claim 7
Dependent Claim
151 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing the phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating said phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and a D/A converter counter operable with said main counter for operating said swallow counter to count pulses to produce a pulse-width-modulated signal corresponding to said phase-compared signal after said counter has finished counting pulses, and for adding said pulse-width-modulated signal to said phase-compared signal.
Claim 8
Dependent Claim
151 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing the phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating said phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and a D/A converter counter operable with said main counter for operating said swallow counter to count pulses to produce a pulse-width-modulated signal corresponding to said phase-compared signal after said counter has finished counting pulses, and for adding said pulse-width-modulated signal to said phase-compared signal.
Claim 9
Dependent Claim
42 words
The slip phase control phase-locked loop of claim 6, wherein said swallow counter and said main counter of said binary programmable frequency dividing means are both coupled to receive an output of said 2-scale-factor prescaler of said binary programmable frequency dividing means.
Claim 10
Dependent Claim
24 words
The slip phase control phase-locked loop of claim 7, wherein said D/A converter counter is coupled to receive an output of said 2-scale-factor prescaler.
Claim 11
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 8, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
Claim 12
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 7, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
Claim 13
Dependent Claim
152 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing the phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating a phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and a D/A converter counter operable with said swallow counter for operating said main counter to count pulses to produce a pulse-width-modulated signal corresponding to said phase-compared signal after said swallow counter has finished counting pulses, and for adding said pulse-width-modulated signal to said phase-compared signal.
Claim 14
Dependent Claim
152 words
A slip phase control phase-locked loop comprising: a voltage-controlled oscillator for generating a frequency signal; binary programmable frequency dividing means for receiving said frequency signal and for producing a frequency-divided signal in response to said frequency signal supplied thereto, said binary programmable frequency dividing means including a 2-scale-factor prescaler, a swallow counter, and a main counter; phase-comparing/integrating means for comparing the phase of said frequency-divided signal with the phase of a reference frequency signal and producing a phase-compared signal, said phase-comparing/integrating means further including means for integrating a phase-compared signal and producing an integrated signal, and means for applying the integrated signal to said voltage-controlled oscillator; and a D/A converter counter operable with said swallow counter for operating said main counter to count pulses to produce a pulse-width-modulated signal corresponding to said phase-compared signal after said swallow counter has finished counting pulses, and for adding said pulse-width-modulated signal to said phase-compared signal.
Claim 15
Dependent Claim
42 words
The slip phase control phase-locked loop of claim 11, wherein said swallow counter and said main counter of said binary programmable frequency dividing means are both coupled to receive an output of said 2-scale-factor prescaler of said binary programmable frequency dividing means.
Claim 16
Dependent Claim
24 words
The slip phase control phase-locked loop of claim 12, wherein said D/A converter counter is coupled to receive an output of said 2-scale-factor prescaler.
Claim 17
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 13, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
Claim 18
Dependent Claim
26 words
The slip phase control phase-locked loop of claim 12, wherein said frequency-divided signal is output from said main counter of said binary programmable frequency dividing means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |