US5358892A
Expired / Lapsed
US
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Etch stop useful in avoiding substrate pitting with poly buffered locos
Assignee: Micron Technology Inc
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Filing: 1993-02-11
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Granted: 1994-10-25
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Expires: 2013-02-11
Abstract
Abstract Active regions on a semiconductor substrate are isolated, whereby an Oxide/Nitride/Oxide sandwich is disposed on a substrate, and a polysilicon layer and a nitride layer are also disposed thereon. The Oxide/Nitride/Oxide sandwich substantially inhibits "pitting" of the substrate when the polysilicon layer is removed. Method of preventing "pitting" of an underlying substrate through the use of a nitride (or other HF-resistant material) disposed beneath the polysilicon layer of a Poly Buffered LOCOS stack.
Inventors
- 👤 J. Brett Rolfson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 22:26
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10P50/00; H10P50/60; H10P50/66; H10P50/663; H10P50/667; Y; Y10; Y10S; Y10S148/00; Y10S148/156; Y10S438/00; Y10S438/954
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
96 words
A method for preventing substrate damage during semiconductor fabrication, said method comprising the following steps of: creating a first oxide layer on a semiconductor substrate; depositing a resistant layer superjacent said first oxide layer; re-oxidizing said resistant layer; depositing a polysilicon layer superjacent said re-oxidized layer; depositing a material which inhibits oxidation of said polysilicon layer superjacent said polysilicon layer, said layers forming a stack; patterning said stack to create designated areas, said areas having a periphery; anisotropically etching all of said layers of said stack outside of said periphery; and oxidizing outside of said periphery.
Claim 2
Independent Claim
96 words
A method for preventing substrate damage during semiconductor fabrication, said method comprising the following steps of: creating a first oxide layer on a semiconductor substrate; depositing a resistant layer superjacent said first oxide layer; re-oxidizing said resistant layer; depositing a polysilicon layer superjacent said re-oxidized layer; depositing a material which inhibits oxidation of said polysilicon layer superjacent said polysilicon layer, said layers forming a stack; patterning said stack to create designated areas, said areas having a periphery; anisotropically etching all of said layers of said stack outside of said periphery; and oxidizing outside of said periphery.
Claim 3
Dependent Claim
27 words
The method according to claim 1, wherein said resistant layer is at least one of a nitride, indium tin oxide, tantalum pentoxide, and a high temperature metal.
Claim 4
Dependent Claim
22 words
The method according to claim 1, further comprising the step of: selectively removing said layers of said stack, thereby exposing said areas.
Claim 5
Dependent Claim
18 words
The method according to claim 1, wherein said re-oxidized layer has a thickness of less than 20 Å.
Claim 6
Dependent Claim
23 words
The method according to claim 1, wherein said anisotropic etch uses chlorine chemistries, said anisotropic etch forming substantially vertical sidewalls on said stack.
Claim 7
Dependent Claim
76 words
A process for isolating active areas on a semiconductor substrate, said process comprising the following steps of: creating an oxide/nitride/oxide sandwich on a semiconductor substrate using thermal re-oxidation; disposing a buffer layer superjacent said sandwich; disposing a nitride layer superjacent said buffer layer; masking said nitride layer, said nitride layer having masked portions and unmasked portions; anisotropically etching said unmasked portions of said nitride layer through said buffer layer and said sandwich; and oxidizing said substrate.
Claim 8
Dependent Claim
76 words
A process for isolating active areas on a semiconductor substrate, said process comprising the following steps of: creating an oxide/nitride/oxide sandwich on a semiconductor substrate using thermal re-oxidation; disposing a buffer layer superjacent said sandwich; disposing a nitride layer superjacent said buffer layer; masking said nitride layer, said nitride layer having masked portions and unmasked portions; anisotropically etching said unmasked portions of said nitride layer through said buffer layer and said sandwich; and oxidizing said substrate.
Claim 9
Dependent Claim
17 words
The isolation process according to claim 6, wherein said thermal re-oxidation is performed in a steam ambient.
Claim 10
Dependent Claim
24 words
The isolation process according to claim 6, wherein said thermal re-oxidation is performed at a temperature substantially in an approximate range of 900° C.
Claim 11
Dependent Claim
29 words
The isolation process according to claim 6, further comprising the steps of: removing said masked portions of said nitride layer removing said buffer layer; and removing said oxide/nitride/oxide sandwich.
Claim 12
Dependent Claim
15 words
The isolation process according to claim 7, wherein said nitride layer is approximately 2400 Å.
Claim 13
Dependent Claim
13 words
The isolation process according to claim 10, wherein said buffer layer comprises polysilicon.
Claim 14
Dependent Claim
23 words
The isolation process according to claim 6, wherein said oxide/nitride/oxide sandwich is substantially in the range of 120 Å oxide/100 Å nitride/10 Åoxide.
Claim 15
Dependent Claim
88 words
A process for manufacture of semiconductors, said process comprising the following steps of: creating a pad oxide superjacent a semiconductor substrate; disposing a first nitride layer superjacent said pad oxide; re-oxidizing said first nitride layer; disposing a buffer layer superjacent said re-oxidizing nitride layer; disposing a second nitride layer superjacent said buffer layer; said layers forming a stack; patterning said stack of layers, thereby creating patterned and unpatterned portions; and anisotropically etching all of said layers of said stack in said unpatterned portions, thereby exposing said pad oxide.
Claim 16
Dependent Claim
88 words
A process for manufacture of semiconductors, said process comprising the following steps of: creating a pad oxide superjacent a semiconductor substrate; disposing a first nitride layer superjacent said pad oxide; re-oxidizing said first nitride layer; disposing a buffer layer superjacent said re-oxidizing nitride layer; disposing a second nitride layer superjacent said buffer layer; said layers forming a stack; patterning said stack of layers, thereby creating patterned and unpatterned portions; and anisotropically etching all of said layers of said stack in said unpatterned portions, thereby exposing said pad oxide.
Claim 17
Dependent Claim
17 words
The process according to claim 13, further comprising the step of: further oxidizing said exposed pad oxide.
Claim 18
Dependent Claim
17 words
The process according to claim 14, further comprising the step of: removing said layers of said stack.
Claim 19
Dependent Claim
15 words
The process according to claim 15, wherein said nitride layers are removed using phosphoric acid.
Claim 20
Dependent Claim
12 words
The process according to claim 15, wherein said buffer layer comprises polysilicon.
Claim 21
Dependent Claim
22 words
The process according to claim 17, wherein said polysilicon is removed using at least one of hydrofluoric acid and wet polysilicon etchants.
Claim 22
Dependent Claim
19 words
The process according to claim 18, wherein said first nitride prevents said hydrofluoric acid from penetrating said pad oxide.
Claim 23
Dependent Claim
24 words
The process according to claim 18, wherein said first nitride prevents said wet polysilicon etchants from penetrating said pad oxide and attacking said substrate.
Claim 24
Dependent Claim
18 words
The process according to claim 13, wherein said re-oxidized layer is in the approximate range of 10 Å.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-24 | 1998-04-25 | 1998-10-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-24 | 2002-04-25 | 2002-10-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-24 | 2006-04-25 | 2006-10-25 | $7700.00 | Window Closed / Lapsed |