Single inline memory module support system

Claim 2

A support system for a computer system which enables a computer to recognize and address a plurality of circuit boards, each of said circuit boards installed in a receiving socket having a fixed number of pins, wherein a required number of signals transmitted between said support system and said circuit board and between said circuit board and said support system may be larger than can be transmitted by the fixed number of pins of said receiving socket, said support system comprising: a single pin on said receiving socket shared by a first signal for conveying information from said circuit board to said support system and a second signal for conveying information from said support system to said circuit board, said first signal having one of first and second logic states; a latch in said support system that stores the logic state of said first signal upon receiving an active reset signal from said computer system; and a transmission enable logic system in said support system that enables transmission of said second signal from said support system to said circuit board via said single pin when said reset signal is no longer active when said first signal is in said first logic state and that disables transmission of said second signal from said support system to said circuit board on said single pin when said first signal is in said second logic state.

Claim 3

A support system as defined in claim 1, further comprising: an input buffer to isolate said first signal from the rest of said support system; and an output buffer to isolate the transmission of said second signal from the rest of said support circuitry.

Claim 4

A single inline memory module (SIMM) support system for a computer system which enables the computer system to recognize and address a SIMM having a storage capacity which may be larger than can be addressed by the number of pins provided on a receiving socket for said SIMM, comprising: a shared signal line connected to a single pin of said receiving socket, said shared signal line being used to transmit both (1) a storage capacity signal for conveying an indication of the storage capacity of an installed SIMM from said SIMM to said support system, said storage capacity signal having a first logic state and a second logic, and (2) an address signal for conveying at least one bit of address information from said support system to said SIMM, said one bit of address information being needed to address the largest storage capacity SIMM that can be installed in said receiving socket; a latch that stores the state of said storage capacity signal of the installed SIMM in response to a reset signal received from said computer system; and a transmission enable logic system that enables transmission of said at least one bit of address information on said shared line when the state of said storage capacity signal stored in said latch is said first logic state, said transmission enable logic system disabling transmission of said at least one bit of address information on said shared line when the state of said storage capacity signal stored in said latch is said second logic state.

Claim 5

A single inline memory module (SIMM) support system for a computer system which enables the computer system to recognize and address a SIMM having a storage capacity which may be larger than can be addressed by the number of pins provided on a receiving socket for said SIMM, comprising: a shared signal line connected to a single pin of said receiving socket, said shared signal line being used to transmit both (1) a storage capacity signal for conveying an indication of the storage capacity of an installed SIMM from said SIMM to said support system, said storage capacity signal having a first logic state and a second logic, and (2) an address signal for conveying at least one bit of address information from said support system to said SIMM, said one bit of address information being needed to address the largest storage capacity SIMM that can be installed in said receiving socket; a latch that stores the state of said storage capacity signal of the installed SIMM in response to a reset signal received from said computer system; and a transmission enable logic system that enables transmission of said at least one bit of address information on said shared line when the state of said storage capacity signal stored in said latch is said first logic state, said transmission enable logic system disabling transmission of said at least one bit of address information on said shared line when the state of said storage capacity signal stored in said latch is said second logic state.

Claim 6

A SIMM support system as defined in claim 3, wherein said transmission enable logic system comprises an output buffer to selectively isolate the transmission of said one bit of address information from the rest of the support system.

Claim 7

A SIMM support system as defined in claim 4, wherein said output buffer additionally comprises an output driver.

Claim 8

A SIMM support system as defined in claim 3, further comprising an input buffer to isolate the received storage capacity signal of the installed SIMM from the rest of the support system.

Claim 9

A SIMM support system as defined in claim 3, wherein said shared signal line is tied to a pull-up resister to cause said storage capacity signal to have a first logic low state when a 1-Mbyte SIMM has been installed and to have a second logic high state corresponding to said predetermined state when a 4-Mbyte or a 16-Mbyte SIMM has been installed.

Claim 10

A SIMM support system as defined in claim 3, further comprising an input buffer to isolate the received storage capacity signal of the installed SIMM from the rest of the support system, and wherein said transmission enable logic system comprises an output buffer to selectively isolate the transmission of said one bit of address information from the rest of the support system, said input buffer and said output buffer together comprising an input/output buffer cell.

Claim 11

A SIMM support system as defined in claim 3, wherein said transmission enable logic system comprises a two-input OR-gate.

Claim 12

A SIMM support system as defined in claim 3, wherein said transmission enable logic system enables said transmission of the uppermost SIMM address line after waiting a specified amount of time after a system reset, except when a 1-Mbyte SIMM is installed.

Claim 13

A single inline memory module (SIMM) support system for a computer system which enables the computer to recognize and address SIMMs of different storage capacity installed in a specifically sized receiving socket, comprising: means for sharing a specific pin of said SIMM and a corresponding pin of said receiving socket for transmission of a signal indicating the storage capacity of an installed SIMM from said SIMM to said support system and for transmitting an address signal from said support system to said SIMM, said address signal being needed to address the SIMM of the largest storage capacity installed in said receiving socket; means for receiving said storage capacity indicating signal of said installed SIMM, said storage capacity indicating signal having a first state indicating that said SIMM has a storage capacity greater than a minimum Storage capacity and having a second state indicating that said SIMM has said minimum storage capacity; means for storing a stored logic level responsive to said storage capacity indicating signal upon receiving a reset signal from said computer system, said stored logic level being a first logic level when said storage capacity indicating signal has said first state, said stored logic level being a second logic level when said storage capacity indicating signal has said second state; and means for selectively transmitting said address signal via said shared SIMM pin and said corresponding pin of said receiving socket in response to said stored logic level, said transmitting means enabling the transmission of said address signal when said stored logic level has said first logic level, said transmitting means disabling the transmission of said address signal when said stored logic level has said second logic level.

Claim 14

A single inline memory module (SIMM) support system for a computer system which enables the computer to recognize and address SIMMs of different storage capacity installed in a specifically sized receiving socket, comprising: means for sharing a specific pin of said SIMM and a corresponding pin of said receiving socket for transmission of a signal indicating the storage capacity of an installed SIMM from said SIMM to said support system and for transmitting an address signal from said support system to said SIMM, said address signal being needed to address the SIMM of the largest storage capacity installed in said receiving socket; means for receiving said storage capacity indicating signal of said installed SIMM, said storage capacity indicating signal having a first state indicating that said SIMM has a storage capacity greater than a minimum Storage capacity and having a second state indicating that said SIMM has said minimum storage capacity; means for storing a stored logic level responsive to said storage capacity indicating signal upon receiving a reset signal from said computer system, said stored logic level being a first logic level when said storage capacity indicating signal has said first state, said stored logic level being a second logic level when said storage capacity indicating signal has said second state; and means for selectively transmitting said address signal via said shared SIMM pin and said corresponding pin of said receiving socket in response to said stored logic level, said transmitting means enabling the transmission of said address signal when said stored logic level has said first logic level, said transmitting means disabling the transmission of said address signal when said stored logic level has said second logic level.