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US5357221A Expired / Lapsed US ⏱️ 0.0 years remaining

Regulation of modulator I and Q signal phasing

Assignee: Nokia Oyj
•
Filing: 1992-08-25
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Granted: 1994-10-18
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Expires: 2012-08-25
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Abstract

Abstract Electronic apparatus generates first and second output signals having a quadrature phase relationship therebetween. A local oscillator signal with a reference phase is applied as an input to first and second signal branches. The second signal branch includes a phase control circuit for subjecting input signals passing therethrough to a determined phase shift. The phase control circuit is responsive to an applied DC control signal to adjust any phase shift error through the phase shift circuit from a predetermined phase shift to assure that the second output signal exhibits the required quadrature phase relationship to the first output signal. A memory/microprocessor combination stores a digital value that is indicative of a DC control signal which must be applied to the control circuit to alter the phase shift through the phase control circuit to the predetermined phase shift. The microprocessor accesses the digital parameter and applies it to the phase control circuit through a digital to analog converter. The apparatus is included as part of a radiotelephone wherein quadrature signals are required for modulation purposes.

Inventors

  • 👤 Jorma Matero

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 13:39
CPC Classifications
H; H03; H03L; H03L7/00; H03H; H03H11/00; H03H11/02; H03H11/16; H03H11/22

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 227 words
An electronic apparatus including a circuit for generating first and second output signals from an input signal, the first and second output signals having a quadrature phase relationship therebetween, comprising: local oscillator means for providing said input signal; a first signal branch connected to said local oscillator means for receiving said input signal and for providing said first output signals; a second signal branch connected to said local oscillator means for receiving said input signal and or providing said second output signals, said second signal branch including phase control means for subjecting said input signal to a determine phase shift and responsive to an applied DC control signal to adjust a phase shift error through said phase shift means from said determined phase shift, so as to assure that said second output signal exhibits said quadrature phase relationship with said first output signals; a memory for storing a digital parameter indicative of a DC control signal that when applied to said phase control means enables an alteration of a phase shift of said input signal through said phase control means to said determined phase shift; a microprocessor associated with said memory for accessing said digital parameter; and a digital-to-analog converter coupled to said phase control means for converting said digital parameter to said DC control signal and applying said DC control signal to said phase control means.
Claim 2
Dependent Claim 227 words
An electronic apparatus including a circuit for generating first and second output signals from an input signal, the first and second output signals having a quadrature phase relationship therebetween, comprising: local oscillator means for providing said input signal; a first signal branch connected to said local oscillator means for receiving said input signal and for providing said first output signals; a second signal branch connected to said local oscillator means for receiving said input signal and or providing said second output signals, said second signal branch including phase control means for subjecting said input signal to a determine phase shift and responsive to an applied DC control signal to adjust a phase shift error through said phase shift means from said determined phase shift, so as to assure that said second output signal exhibits said quadrature phase relationship with said first output signals; a memory for storing a digital parameter indicative of a DC control signal that when applied to said phase control means enables an alteration of a phase shift of said input signal through said phase control means to said determined phase shift; a microprocessor associated with said memory for accessing said digital parameter; and a digital-to-analog converter coupled to said phase control means for converting said digital parameter to said DC control signal and applying said DC control signal to said phase control means.
Claim 3
Dependent Claim 52 words
An electronic apparatus according to claim 1 wherein the phase control means comprises a capacitance diode whose capacitance varies in dependence upon the DC control signal, the phase of the first output signal varying in dependence upon the value of the capacitance and thus upon the value of the DC control signal.
Claim 4
Dependent Claim 48 words
An electronic apparatus according to claim 1 in which the digital parameter stored in said memory corresponds to a DC control signal value determined during testing of said electronic apparatus which adjusts for any deviation through said phase control means of phase shift from said determined phase shift.
Claim 5
Dependent Claim 65 words
An electronic apparatus according to claim 1 and further comprising: temperature sensing means for sensing a temperature of the electronic apparatus and for transmitting a temperature signal in response thereto to the microprocessor, the microprocessor operable to generate a correction of said digital parameter in response to the temperature signal for varying the value of the DC control signal to compensate for the temperature variation.
Claim 6
Dependent Claim 37 words
An electronic apparatus according to claim 1 wherein the electronic apparatus is a digital radio telephone, comprising a radio frequency modulator, the first and second output signals being coupled to the radio frequency modulator for control thereof.

References Cited (Backward Citations)

US3555458A Cited
US3921079A Cited
US4475088A Cited
GB2196195A Cited
EP0265218A2 Cited
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GB2244611A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-17 1998-04-18 1998-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-17 2002-04-18 2002-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-17 2006-04-18 2006-10-18 $7700.00 Window Closed / Lapsed

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