US5355490A
Expired / Lapsed
US
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System and method for saving the state for advanced microprocessor operating modes
Assignee: Toshiba America Information Systems Inc
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Filing: 1991-06-14
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Granted: 1994-10-11
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Expires: 2011-06-14
Abstract
Abstract In accordance with the present invention, a resume processing driver for an advanced microprocessor, such as the Intel 80386 operating in enhanced mode, is provided which saves data indicative of the operating conditions of the advanced microprocessor into system memory and then calls a previously existing resume processing routine designed for a previously existing operating system, such as MS-DOS operating in real mode. The previously existing resume processing routine performs additional processing in order to save operating condition data associated with the previously existing operating system into system memory, and then performs a controlled power off sequence and removes the power supplied to all elements of the computer except the computer memory. Thereafter, the existing resume processing routine performs processing to restore the operating condition data associated with the previously existing operating system from system memory and then passes control to the resume processing driver of the present invention. The resume processing driver restores the data indicative of the operating conditions of the advanced microprocessor from system memory, and control then passes to the computer program which was executing before the resume processing driver was initiated. In addition, in another embodiment, the present invention is able to properly switch from the enhanced mode to the real mode and then back to the enhanced mode for use in applications other than resume functions.
Inventors
- 👤 James T. L. Kou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 23:33
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/461; G06F9/463
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
136 words
In a computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode, a method of saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system, comprising the steps of: (a) receiving, while in the enhanced mode, a power-down request to power down the computer system; (b) actuating, in response to said step (a), a resume processing module residing in the system memory for saving operational states and switching modes, accessible to the CPU during operation in the real mode; (c) saving the operational state of the enhanced mode using said resume processing module; (d) switching from the enhanced mode to the real mode using said resume processing module; (e) performing a controlled power-off sequence.
Claim 2
Dependent Claim
136 words
In a computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode, a method of saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system, comprising the steps of: (a) receiving, while in the enhanced mode, a power-down request to power down the computer system; (b) actuating, in response to said step (a), a resume processing module residing in the system memory for saving operational states and switching modes, accessible to the CPU during operation in the real mode; (c) saving the operational state of the enhanced mode using said resume processing module; (d) switching from the enhanced mode to the real mode using said resume processing module; (e) performing a controlled power-off sequence.
Claim 3
Dependent Claim
20 words
The method of claim 1, wherein steps (a)-(d) are performed responsive to a non-maskable interrupt being detected by the CPU.
Claim 4
Dependent Claim
18 words
The method of claim 1, wherein said enhanced mode corresponds to a virtual 8086 mode of said CPU.
Claim 5
Dependent Claim
73 words
The method of claim 3, wherein step (g) comprises the steps of: (i) enabling said interrupts associated with said CPU, (ii) switching from the real mode to a second intermediate operational mode, (iii) switching from said second intermediate operational mode to said first intermediate operational mode, (iv) switching from said first intermediate operational mode to the enhanced mode, and (v) aligning said plurality of instructions executing on said CPU responsive to step (iii).
Claim 6
Dependent Claim
20 words
The method of claim 4, wherein said first intermediate operational mode corresponds to an 80386 protected mode of said CPU.
Claim 7
Dependent Claim
20 words
The method of claim 4, wherein said second intermediate operational mode corresponds to an 80286 protected mode of said CPU.
Claim 8
Dependent Claim
65 words
The method of claim 3, wherein step (d) comprises the steps of: (i) switching from the enhanced mode to a first intermediate operational mode, (ii) switching from said first intermediate operational mode to a second intermediate operational mode, (iii) aligning said plurality of instructions executing on said CPU responsive to step (ii), and (iv) switching from said second intermediate operational mode to the real mode.
Claim 9
Dependent Claim
20 words
The method of claim 7, wherein said first intermediate operational mode corresponds to an 80386 protected mode of said CPU.
Claim 10
Dependent Claim
20 words
The method of claim 7, wherein said second intermediate operational mode corresponds to an 80286 protected mode of said CPU.
Claim 11
Dependent Claim
41 words
The method of claim 1, further comprising the steps of: (f) receiving a power-on indication; (g) switching from the real operational mode to the enhanced mode; and (h) restoring said operational state of the enhanced mode saved in said step (c).
Claim 12
Dependent Claim
57 words
The method of claim 10, wherein step (g) comprises the steps of: (i) enabling said interrupts associated with said CPU, (ii) switching from the real mode to an intermediate operational mode, (iii) switching from said intermediate operational mode to the enhanced mode, and (iv) aligning said plurality of instructions executing on said CPU responsive to step (iii).
Claim 13
Dependent Claim
20 words
The method of claim 11, wherein said intermediate operational mode corresponds to an Intel 80286 protected mode of said CPU.
Claim 14
Dependent Claim
131 words
The method of claim 10, wherein step (h) comprises the steps of: (i) restoring a task state register and a machine status register, said registers being associated with the enhanced mode of said CPU and being previously saved in step (c), (ii) restoring a global descriptor table register, a local descriptor table register, and an interrupt descriptor table register, said descriptor tables being associated with the enhanced mode of said CPU and being previously save in step (c), (iii) restoring registers associated with a stack, said stack being associated with the enhanced mode of said CPU and said registers being previously saved in step (c), and (iv) restoring processor control registers, said processor control registers being associated with the enhanced mode of said CPU and being previously saved in step (c).
Claim 15
Dependent Claim
49 words
The method of claim 1, wherein step (d) comprises the steps of: (i) switching from the enhanced mode to an intermediate operational mode, (ii) aligning said plurality of instructions executing on said CPU responsive to step (i), and (iii) switching from said intermediate operational mode to the real mode.
Claim 16
Dependent Claim
20 words
The method of claim 14, wherein said intermediate operational mode corresponds to an Intel 80286 protected mode of said CPU.
Claim 17
Dependent Claim
107 words
The method of claim 1, wherein step (c) comprises the steps of: (i) disabling interrupts associated with said CPU, (ii) saving a task state register and a machine status register, said registers being associated with the enhanced mode of said CPU, (iii) saving a global descriptor table register, a local descriptor table register, and an interrupt descriptor table register, said descriptor tables being associated with the enhanced mode of said CPU, (iv) saving registers associated with a stack, said stack being associated with the enhanced mode of said CPU, (v) saving processor control registers, said processor control registers being associated with the enhanced mode of said CPU.
Claim 18
Dependent Claim
13 words
The method of claim 1, wherein said CPU is an Intel 80386-compatible microprocessor.
Claim 19
Dependent Claim
18 words
The method of claim 1, wherein said enhanced mode corresponds to an 80386 protected mode of said CPU.
Claim 20
Dependent Claim
49 words
The method of claim 1, further comprising the steps, prior to said step (a), of: (i) allocating a block of memory located below a 1 MByte boundary associated with said CPU for use by said resume processing module, (ii) copying said resume processing module to said block of memory.
Claim 21
Dependent Claim
20 words
The method of claim 1, wherein step (a) is performed responsive to a non-maskable interrupt being detected by said CPU.
Claim 22
Dependent Claim
15 words
The method of claim 1, wherein said CPU is operating under the Microsoft Windows environment.
Claim 23
Dependent Claim
16 words
The method of claim 1, wherein said resume processing module is a Microsoft Windows device driver.
Claim 24
Dependent Claim
32 words
The method of claim 1, further comprising the step prior to said step (a) of allocating system memory in an address area accessible to the CPU while operating in the real mode.
Claim 25
Dependent Claim
25 words
The method of claim 1, wherein said step (c) further comprises the step of saving the operational state of the enhanced mode in system memory.
Claim 26
Dependent Claim
20 words
The method of claim 1, further comprising the step (d) after step of saving the state of the real mode.
Claim 27
Dependent Claim
155 words
In a computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode, said CPU being able to execute a plurality of instructions and wherein said enhanced and real modes utilize different memory addressing and data register schemes, a method of switching from the enhanced mode to the real mode, and subsequently switching back to the enhanced mode, said mode switching method comprising the steps of: (a) saving an operational state of the enhanced mode, (b) switching from the enhanced mode to the real mode, (c) executing a resume processing program, residing in system memory, designed to operate in the real mode and be accessible to the CPU during operation in the real mode, (d) switching from the real mode to the enhanced mode, (e) performing a controlled power-off sequence, and (f) restoring said operational state of the enhanced mode saved in step (a).
Claim 28
Dependent Claim
155 words
In a computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode, said CPU being able to execute a plurality of instructions and wherein said enhanced and real modes utilize different memory addressing and data register schemes, a method of switching from the enhanced mode to the real mode, and subsequently switching back to the enhanced mode, said mode switching method comprising the steps of: (a) saving an operational state of the enhanced mode, (b) switching from the enhanced mode to the real mode, (c) executing a resume processing program, residing in system memory, designed to operate in the real mode and be accessible to the CPU during operation in the real mode, (d) switching from the real mode to the enhanced mode, (e) performing a controlled power-off sequence, and (f) restoring said operational state of the enhanced mode saved in step (a).
Claim 29
Dependent Claim
162 words
A computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode capable of saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system, comprising: power-down detection means for receiving, while in the enhanced mode, a power-down request to power down the computer system; actuation means for actuating, in response to said power-down detection means, a resume processing module residing in the system memory for saving operational states and switching modes, accessible to the CPU during operation in the real mode; state saving means, responsive to said power-down detection means, for saving the operational state of the enhanced mode using said resume processing module; a processor mode switcher for switching the CPU from the enhanced mode to the real mode using said resume processing module; and power-down means for performing a controlled power-off sequence in response to said processor mode switcher.
Claim 30
Dependent Claim
162 words
A computer system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode capable of saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system, comprising: power-down detection means for receiving, while in the enhanced mode, a power-down request to power down the computer system; actuation means for actuating, in response to said power-down detection means, a resume processing module residing in the system memory for saving operational states and switching modes, accessible to the CPU during operation in the real mode; state saving means, responsive to said power-down detection means, for saving the operational state of the enhanced mode using said resume processing module; a processor mode switcher for switching the CPU from the enhanced mode to the real mode using said resume processing module; and power-down means for performing a controlled power-off sequence in response to said processor mode switcher.
Claim 31
Dependent Claim
28 words
The computer system of claim 27, wherein said process mode switcher switches the CPU from the real mode to the enhanced mode upon receipt of a power-on indication.
Claim 32
Dependent Claim
26 words
The computer system of claim 28, further comprising state restoration means for restoring said operational state of the enhanced mode saved by said state saving means.
Claim 33
Dependent Claim
24 words
The computer system of claim 27, wherein said power-down detection means is activated in response to a non-maskable interrupt being detected by the CPU.
Claim 34
Dependent Claim
161 words
A computer implemented system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode for saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system and for subsequently restoring the state of the CPU corresponding to the enhanced mode, comprising: state saving means for saving the operational state of the enhanced mode; a processor mode switcher, responsive to said state saving means, for switching the CPU from the enhanced mode to the real mode; a resume processing program residing in system memory, responsive to said processor mode switcher, designed to operate in the real mode and be accessible to the CPU during operation in the real mode, said processor mode switching means for switching from the real mode to the enhanced mode, and state restoration means for restoring said operational state of the enhanced mode saved by said state saving means.
Claim 35
Dependent Claim
161 words
A computer implemented system having a system memory and a central processing unit (CPU) operable in an enhanced mode and in a real mode for saving an operational state of the CPU corresponding to the enhanced mode prior to a power-down of the computer system and for subsequently restoring the state of the CPU corresponding to the enhanced mode, comprising: state saving means for saving the operational state of the enhanced mode; a processor mode switcher, responsive to said state saving means, for switching the CPU from the enhanced mode to the real mode; a resume processing program residing in system memory, responsive to said processor mode switcher, designed to operate in the real mode and be accessible to the CPU during operation in the real mode, said processor mode switching means for switching from the real mode to the enhanced mode, and state restoration means for restoring said operational state of the enhanced mode saved by said state saving means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-10 | 1998-04-11 | 1998-10-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-10 | 2002-04-11 | 2002-10-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-10 | 2006-04-11 | 2006-10-11 | $7700.00 | Window Closed / Lapsed |