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US5355389A Expired / Lapsed US ⏱️ 0.0 years remaining

Reciprocal mode saw correlator method and apparatus

Assignee: Intel Corp
•
Filing: 1993-01-13
•
Granted: 1994-10-11
•
Expires: 2013-01-13
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Abstract

Abstract A surface-acoustic-wave correlator for decoding a spread-spectrum signal having a data signal modulated with a plurality of chip sequences and reciprocal-chip sequences. A tapped-delay-line has a plurality of taps defining a tapped-delay-line structure matched to the chip sequence. In response to a plurality of first chips and second chips embedded in the spread-spectrum signal, the tapped-delay line generates TDL-chip sequences and inverse-TDL-chip sequences. A first transducer is acoustically coupled to the tapped-delay-line. In response to the spread-spectrum signal modulated by the chip sequence, the first transducer correlates a first group of the plurality of TDL-chip sequences and inverse-TDL-chip sequences and outputs a first correlation pulse. A second transducer is acoustically coupled to the tapped-delay-line. In response to the spread-spectrum signal modulated by the reciprocal-chip sequence, the second transducer correlates a second group of the plurality of TDL-chip sequences and inverse-TDL-chip sequences and outputs a second correlation pulse. In response to the first' correlation pulse and the second correlation pulse, a decision circuit outputs the first bit and the second bit, respectively.

Inventors

  • 👤 George D. O'Clock
  • 👤 Jeffrey S. Vanderpool

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 15:19
CPC Classifications
H; H04; H04B; H04B1/00; H04B1/69; H04B1/707; H04B1/709; G; G06; G06F; G06F17/00; G06F17/10; G06F17/15; G06G; G06G7/00; G06G7/12; G06G7/19; G06G7/195; H04B1/70712

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 182 words
A correlator for decoding a spread-spectrum signal having a data signal modulated with a plurality of chip sequences and reciprocal-chip sequences, comprising a tapped-delay-line having a plurality of taps defining a tapped-delay-line structure matched to the chip sequence, responsive to a plurality of first chips and second chips embedded in the spread-spectrum signal, and capable of generating a plurality of first chip sequences and a plurality of second chip sequences, said second chip sequences being reciprocal forms of said first chip sequences, respectively; a first transducer, responsive to the spread-spectrum signal modulated by the chip sequence, capable of correlating a first group of the plurality of first chip sequences and second chip sequences generated by said tapped-delay-line and capable of outputting a first correlation pulse; a second transducer, responsive to the spread-spectrum signal modulated by the reciprocal-chip sequence, capable of correlating a second group of the plurality of first chip sequences and second chip sequences generated by said tapped-delay-line and capable of outputting a second correlation pulse; and a decision circuit responsive to the first correlation pulse and the second correlation pulse.
Claim 2
Dependent Claim 182 words
A correlator for decoding a spread-spectrum signal having a data signal modulated with a plurality of chip sequences and reciprocal-chip sequences, comprising a tapped-delay-line having a plurality of taps defining a tapped-delay-line structure matched to the chip sequence, responsive to a plurality of first chips and second chips embedded in the spread-spectrum signal, and capable of generating a plurality of first chip sequences and a plurality of second chip sequences, said second chip sequences being reciprocal forms of said first chip sequences, respectively; a first transducer, responsive to the spread-spectrum signal modulated by the chip sequence, capable of correlating a first group of the plurality of first chip sequences and second chip sequences generated by said tapped-delay-line and capable of outputting a first correlation pulse; a second transducer, responsive to the spread-spectrum signal modulated by the reciprocal-chip sequence, capable of correlating a second group of the plurality of first chip sequences and second chip sequences generated by said tapped-delay-line and capable of outputting a second correlation pulse; and a decision circuit responsive to the first correlation pulse and the second correlation pulse.

References Cited (Backward Citations)

US27738A Cited
US4247942A Cited
US4051448A Cited
US3934203A Cited
US4653069A Cited
US3978436A Cited
US4217563A Cited
US4021898A Cited
US4163944A Cited
US4100498A Cited
US4131484A Cited
US4285060A Cited
US4189677A Cited
US4222115A Cited
US4562370A Cited
US4314393A Cited
US4445256A Cited
US4355411A Cited
US4455651A Cited
US4418393A Cited
US4418425A Cited
US4425661A Cited
US4525835A Cited
US4432089A Cited
US4425642A Cited
US4517679A Cited
US4456793A Cited
US4563774A Cited
US4484028A Cited
US4787093A Cited
US4550414A Cited
US4606039A Cited
US4612637A Cited
US4649549A Cited
US4707839A Cited
US4680785A Cited
US4660164A Cited
US4642505A Cited
US4601047A Cited
US4561089A Cited
US4567588A Cited
US4691326A Cited
US4569062A Cited
US4745378A Cited
US4621365A Cited
US4979186A Cited
US4641317A Cited
US4813057A Cited
US4622854A Cited
US5005183A Cited
US4866732A Cited
US4769812A Cited
US4742512A Cited
US4754453A Cited
US4918689A Cited
US4672254A Cited
US4672658A Cited
US4701904A Cited
JPS62102638A Cited
US4647863A Cited
US4724435A Cited
US4718080A Cited
US4703474A Cited
US4815106A Cited
US4837786A Cited
US4807222A Cited
US4837802A Cited
US4860307A Cited
US4754473A Cited
US4901307A Cited
US4804938A Cited
US4759078A Cited
US4759034A Cited
US4774715A Cited
US4833702A Cited
US4893327A Cited
US4905221A Cited
US4894842A Cited
US4800885A Cited
US4878238A Cited
US4965759A Cited
US4805208A Cited
US5073899A Cited
US4995083A Cited
US4984247A Cited
US4945973A Cited
US5023887A Cited
US5022046A Cited
US5042050A Cited
US5008953A Cited
US5016255A Cited
US5022047A Cited
US5056109A Cited
US5101501A Cited
US5109390A Cited
US5073900A Cited
US5025452A Cited
US5018165A Cited
US5081642A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-10 1998-04-11 1998-10-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-10 2002-04-11 2002-10-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-10 2006-04-11 2006-10-11 $7700.00 Window Closed / Lapsed

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