US5352945A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage compensating delay element
Assignee: Micron Technology Inc
•
Filing: 1993-03-18
•
Granted: 1994-10-04
•
Expires: 2013-03-18
Abstract
Abstract A signal-delaying capacitive circuit applied to a node in a microcircuit device is immunized against the variation of the supply voltage by a metal-oxide semiconductor connected in series between the node and the signal-delaying capacitive circuit. The gate of the semiconductor is biased with a voltage signal proportional to the supply voltage, whereby the resistance of the semiconductor is increased as the supply voltage decreases; thus, isolating the capacitive circuit from the node and reducing the delay.
Inventors
- 👤 Stephen L. Casper
- 👤 Daniel R. Loughmiller
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:07
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H03K5/133
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
164 words
In an electronic circuit having a signal path comprising a series of inverters biased by a supply voltage in which a delaying capacitive element is connected in a shunt path at an intermediate node along said signal path at which said signal is being delayed, said shunt path containing said capacitive element between said intermediate node and a reference point, an improvement for compensating for variations in the delaying effect of said capacitive element as a result of variations in the circuit supply voltage, said improvement comprising: a controllable resistance element connected in said shunt path in series with said capicitive element between said intermediate node and said reference point; said resistance element having a resistivity controllable by said bias voltage wherein said resistivity increases and said delaying effect at said node increases when said bias voltage is increased; and means for generating said bias voltage as a function of said supply voltage wherein said bias voltage is increased as the supply voltage increases.
Claim 2
Dependent Claim
164 words
In an electronic circuit having a signal path comprising a series of inverters biased by a supply voltage in which a delaying capacitive element is connected in a shunt path at an intermediate node along said signal path at which said signal is being delayed, said shunt path containing said capacitive element between said intermediate node and a reference point, an improvement for compensating for variations in the delaying effect of said capacitive element as a result of variations in the circuit supply voltage, said improvement comprising: a controllable resistance element connected in said shunt path in series with said capicitive element between said intermediate node and said reference point; said resistance element having a resistivity controllable by said bias voltage wherein said resistivity increases and said delaying effect at said node increases when said bias voltage is increased; and means for generating said bias voltage as a function of said supply voltage wherein said bias voltage is increased as the supply voltage increases.
Claim 3
Dependent Claim
22 words
The improvement of claim 1, wherein said controllable resistance element comprises a transistor having a gate connected to said bias voltage supply.
Claim 4
Dependent Claim
13 words
The improvement of claim 2, wherein said transistor is a first metal-oxide semiconductor.
Claim 5
Dependent Claim
22 words
The improvement of claim 3, wherein said capacitive element comprises a second metal-oxide semiconductor having a source and a drain connected together.
Claim 6
Dependent Claim
28 words
The improvement of claim 4, wherein said second semiconductor has a gate connected to said transistor, and said source and drain are connected together to said reference point.
Claim 7
Dependent Claim
29 words
The improvement of claim 5, wherein said first metal-oxide semiconductor has a drain connected to said node, and a source connected to a gate of said second metal-oxide semiconductor.
Claim 8
Dependent Claim
19 words
The improvement of claim 4, wherein said electronic circuit and said improvement are part of an integrated microcircuit device.
Claim 9
Dependent Claim
13 words
The improvement of claim 7, wherein said electronic circuit is a ring oscillator.
References Cited (Backward Citations)
US3641370A
Cited
US4408168A
Cited
US4980586A
Cited
US5111489A
Cited
US5049767A
Cited
US4975605A
Cited
US5051630A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-10-03 | 1998-04-04 | 1998-10-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-10-03 | 2002-04-04 | 2002-10-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-10-03 | 2006-04-04 | 2006-10-04 | $7700.00 | Window Closed / Lapsed |