Spatial filter of an image signal processor providing alternating line images without moire

Claim 1

A spatial filter of an image signal processor for preprocessing image signals Sd, Sc, Sb, Sh, Sp, Sa, Sg, Sf and Se of pixels sampled in that order in alternating line images to prevent moire from occurring, comprising: first and second 1-line buffer memories arranged in series for respectively storing a group of image signals of pixels which are arranged in a line directed in a main scan direction, a group of image signals of a line stored in the first 1-line buffer memory being transferred to the second 1-line buffer memory each time another group of image signals of another line is transferred to the first 1-line buffer memory, the image signals Sb, Sc, Sd of pixels arranged in a first line being stored in the second 1-line buffer memory as pieces of pixel information Ib, Ic, Id, and the image signals Sa, Sp, Sh of pixels arranged in a second line being stored in the first 1-line buffer memory as pieces of pixel information Ia, Ip, Ih; first and second latch circuits for respectively latching one of the pixel information stored in the second 1-line buffer memory, a piece of pixel information stored in the first latch circuit being transferred to the second latch circuit each time another piece of pixel information is transferred to the first latch circuit, the pixel information Ic being stored in the first latch circuit, and the pixel information Id being stored in the second latch circuit; third and fourth latch circuits for respectively latching one of the pixel information stored in the first 1-line buffer memory, a piece of pixel information stored in the third latch circuit being transferred to the fourth latch circuit each time another piece of pixel information is transferred to the third latch circuit, the pixel information Ip of a pixel of interest being stored in the third latch circuit, and the pixel information Ih being stored in the fourth latch circuit; fifth and sixth latch circuits for respectively latching one of the image signals of pixels arranged in a third line, an image signal stored in the fifth latch circuit being transferred to the sixth latch circuit each time another image signal is transferred to the fifth latch circuit, the image signal Sf being stored in the fifth latch circuit as a piece of pixel information If, and the image signal Sg being stored in the sixth latch circuit as a piece of pixel information Ig; first adding means for adding the pixel information Ia, Ih of pixels adjoining the pixel of interest in the main scan direction to obtain a first information sum, and the pixel information Ic, if of pixels adjoining the pixel of interest in a sub scan direction perpendicular to the main scan direction, the pixel information Ia being output from the first 1-line buffer, the pixel information Ih being output from the fourth latch circuit, the pixel information Ic being output from the first latch circuit, and the pixel information If being output from the fifth latch circuit; second adding means for adding the pixel information Ib, Id, Ig and the image signal Se of pixels adjoining the pixel of interest in diagonal directions to obtain a second information sum, the pixel information Ib being output from the second 1-line buffer, the pixel information Id being output from the second latch circuit, the image signal Se being sent through a signal line in a last order to be treated as a piece of pixel information Ie, and the pixel information Ig being output from the sixth latch circuit; a first multiplier for multiplying the first information sum obtained in the first adding means with a first filter coefficient A to obtain a first multiplied sum; a second multiplier for multiplying the second information sum obtained in the second adding means with a second filter coefficient -B to obtain a second multiplied sum; a third multiplier for multiplying the pixel information Ip of the pixel of interest with a third filter coefficient C to obtain a third multiplied sum; and third adding means for adding the first multiplied sum obtained in the first multiplied, the second multiplied sum obtained in the second multiplier and the third multiplied sum obtained in the third multiplier to obtain a result of a preprocessing of the image signals Sd, Sc, Sb, Sh, Sp, Sa, Sg, Sf and Se.