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US5351128A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device having reduced contact resistance between a channel or base layer and a contact layer

Assignee: Hitachi Ltd
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Filing: 1992-07-27
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Granted: 1994-09-27
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Expires: 2012-07-27
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Abstract

Abstract A field-effect transistor or a bipolar transistor may be provided in which the contact resistance between a channel layer or base layer and a contact layer are reduced. For example, an InGaAs buffer layer may be formed on the substrate side of an InGaAs channel layer of a field-effect transistor and by the bypassing effect that carriers pass through this InGaAs buffer layer, the InGaAs channel layer comes in contact with the contact layer with a low resistance. The contact resistance between the InGaAs channel layer and the contact layer can be reduced to 10 ohm per a width of 10μm, and as a result, the value of transconductance factor K of a field-effect transistor can be increased in 14 mA/V 2 per a width of 10μm.

Inventors

  • 👤 Shigeo Goto
  • 👤 Hidetoshi Matsumoto
  • 👤 Masamitsu Yazawa
  • 👤 Yasunari Umemoto
  • 👤 Yoko Uchida
  • 👤 Kenji Hiruma

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 05:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/87; H10D62/00; H10D62/80; H10D62/85; H10D64/00; H10D64/60; H10D64/62; H10D30/60; H10D30/68; H10D62/852; H10P; H10P10/00

Claims Analysis

Total Claims: 38
Claim 1
Independent Claim 126 words
A semiconductor device comprising: a first n-type semiconductor layer; a second undoped or acceptor impurity doped semiconductor layer formed in contact with one side of said first semiconductor layer; a third undoped or acceptor impurity doped semiconductor layer formed on a side of said second semiconductor layer opposite to said first semiconductor layer; and a fourth n-type semiconductor layer which is a separate body from said first semiconductor layer; wherein said first semiconductor layer and said second semiconductor layer are equal in electron affinity, said third semiconductor layer is smaller in electron affinity than said second semiconductor layer, said second semiconductor layer acts as a carrier bypass path forming layer, and said first or second semiconductor layer is in direct contact with said fourth semiconductor layer.
Claim 2
Dependent Claim 126 words
A semiconductor device comprising: a first n-type semiconductor layer; a second undoped or acceptor impurity doped semiconductor layer formed in contact with one side of said first semiconductor layer; a third undoped or acceptor impurity doped semiconductor layer formed on a side of said second semiconductor layer opposite to said first semiconductor layer; and a fourth n-type semiconductor layer which is a separate body from said first semiconductor layer; wherein said first semiconductor layer and said second semiconductor layer are equal in electron affinity, said third semiconductor layer is smaller in electron affinity than said second semiconductor layer, said second semiconductor layer acts as a carrier bypass path forming layer, and said first or second semiconductor layer is in direct contact with said fourth semiconductor layer.
Claim 3
Dependent Claim 36 words
A semiconductor device according to claim 1, said semiconductor device further comprising a fifth undoped or acceptor impurity doped semiconductor layer formed on a side of said first semiconductor layer opposite to said second semiconductor layer.
Claim 4
Dependent Claim 26 words
A semiconductor device according to claim 2, wherein said fourth semiconductor layer is formed in contact with said first semiconductor layer and said second semiconductor layer.
Claim 5
Dependent Claim 101 words
A semiconductor device according to claim 3, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises GaAs, said fifth semiconductor layer comprises AlGaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 6
Dependent Claim 15 words
A semiconductor device according to claim 4, wherein the critical thickness is approximately 20 nm.
Claim 7
Dependent Claim 101 words
A semiconductor device according to claim 3, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises AlGaAs, said fifth semiconductor layer comprises GaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 8
Dependent Claim 15 words
A semiconductor device according to claim 6, wherein the critical thickness is approximately 20 nm.
Claim 9
Dependent Claim 59 words
A semiconductor device according to claim 3, said semiconductor device further comprising an InP substrate, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises InAlAs, said fifth semiconductor layer comprises InAlAs, and a composition of each of said layers is selected to produce a lattice match with the InP substrate.
Claim 10
Dependent Claim 35 words
A semiconductor device according to claim 8, wherein said first semiconductor layer is a channel layer of a field-effect transistor and said fourth semiconductor layer is a source and a drain contact layer comprising InGaAs.
Claim 11
Dependent Claim 49 words
A semiconductor device according to claim 3, wherein at the contact part of said first semiconductor layer and said fourth semiconductor layer, a part of the surface of said fourth semiconductor layer is in a surface which is almost the same as one surface of said first semiconductor layer.
Claim 12
Dependent Claim 30 words
A semiconductor device according to claim 3, wherein said first semiconductor layer is a base layer of a bipolar transistor and said fourth semiconductor layer is a base contact layer.
Claim 13
Dependent Claim 26 words
A semiconductor device according to claim 1, wherein said fourth semiconductor layer is formed in contact with said first semiconductor layer and said second semiconductor layer.
Claim 14
Dependent Claim 95 words
A semiconductor device according to claim 12, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises GaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 15
Dependent Claim 15 words
A semiconductor device according to claim 13, wherein the critical thickness is approximately 20 nm.
Claim 16
Dependent Claim 53 words
A semiconductor device according to claim 12, said semiconductor device further comprising an InP substrate, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises InAlAs, and a composition of each of said layers is selected to produce a lattice match with the InP substrate.
Claim 17
Dependent Claim 63 words
A semiconductor device according to claim 12, wherein said first semiconductor layer is a channel layer of a field-effect transistor, and said fourth semiconductor layer is a source and a drain contact layer, the part of said fourth semiconductor layer which is in contact with said first and second semiconductor layers comprises InGaAs, and a GaAs layer is laminated on said InGaAs layer.
Claim 18
Dependent Claim 138 words
A semiconductor device comprising: a first p-type semiconductor layer; a second undoped or donor impurity doped semiconductor layer formed in contact with one side of said first semiconductor layer; a third undoped or donor impurity doped semiconductor layer formed on a side of said second semiconductor layer opposite to said first semiconductor layer; and a fourth p-type semiconductor layer which is a separate body from said first semiconductor layer; wherein said first semiconductor layer and said second semiconductor layer are equal in a sum of electron affinity and band gap, said third semiconductor layer is smaller in the sum of electron affinity and band gap than said second semiconductor layer, said second semiconductor layer acts as a carrier bypass path forming layer, and said first or second semiconductor layer is in direct contact with said fourth semiconductor layer.
Claim 19
Dependent Claim 138 words
A semiconductor device comprising: a first p-type semiconductor layer; a second undoped or donor impurity doped semiconductor layer formed in contact with one side of said first semiconductor layer; a third undoped or donor impurity doped semiconductor layer formed on a side of said second semiconductor layer opposite to said first semiconductor layer; and a fourth p-type semiconductor layer which is a separate body from said first semiconductor layer; wherein said first semiconductor layer and said second semiconductor layer are equal in a sum of electron affinity and band gap, said third semiconductor layer is smaller in the sum of electron affinity and band gap than said second semiconductor layer, said second semiconductor layer acts as a carrier bypass path forming layer, and said first or second semiconductor layer is in direct contact with said fourth semiconductor layer.
Claim 20
Dependent Claim 36 words
A semiconductor device according to claim 17, said semiconductor device further comprising a fifth undoped or donor impurity doped semiconductor layer formed on a side of said first semiconductor layer opposite to said second semiconductor layer.
Claim 21
Dependent Claim 26 words
A semiconductor device according to claim 18, wherein said fourth semiconductor layer is formed in contact with said first semiconductor layer and said second semiconductor layer.
Claim 22
Dependent Claim 101 words
A semiconductor device according to claim 19, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises GaAs, said fifth semiconductor layer comprises AlGaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 23
Dependent Claim 15 words
A semiconductor device according to claim 20, wherein the critical thickness is approximately 20 nm.
Claim 24
Dependent Claim 101 words
A semiconductor device according to claim 19, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs said third semiconductor layer comprises AlGaAs, said fifth semiconductor layer comprises GaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 25
Dependent Claim 15 words
A semiconductor device according to claim 22, wherein the critical thickness is approximately 20 nm.
Claim 26
Dependent Claim 59 words
A semiconductor device according to claim 19, said Semiconductor device further comprising an InP substrate, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises InAlAs, said fifth semiconductor layer comprises InAlAs, and a composition of each of said layers is selected to produce a lattice match with the InP substrate.
Claim 27
Dependent Claim 35 words
A semiconductor device according to claim 24, wherein said first semiconductor layer is a channel layer of a field-effect transistor and said fourth semiconductor layer is a source and a drain contact layer comprising InGaAs.
Claim 28
Dependent Claim 49 words
A semiconductor device according to claim 19, wherein at the contact part of said first semiconductor layer and said fourth semiconductor layer, a part of the surface of said fourth semiconductor layer is in a surface which is almost the same as one surface of said first semiconductor layer.
Claim 29
Dependent Claim 30 words
A semiconductor device according to claim 19, wherein said first semiconductor layer is a base layer of a bipolar transistor and said fourth semiconductor layer is a base contact layer.
Claim 30
Dependent Claim 26 words
A semiconductor device according to claim 17, wherein said fourth semiconductor layer is formed in contact with said first semiconductor layer and said second semiconductor layer.
Claim 31
Dependent Claim 95 words
A semiconductor device according to claim 28, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises GaAs, said first and second semiconductor layers are formed on a semiconductor layer of which a lattice constant is different from a lattice constant of said first and second semiconductor layers, and a total thickness of said first and second semiconductor layers is not more than a critical thickness of InGaAs to prevent said first and second semiconductor layers from generating dislocations due to the difference in the lattice constants.
Claim 32
Dependent Claim 15 words
A semiconductor device according to claim 29, wherein the critical thickness is approximately 20 nm.
Claim 33
Dependent Claim 53 words
A semiconductor device according to claim 28, said semiconductor device further comprising an InP substrate, wherein said first semiconductor layer comprises InGaAs, said second semiconductor layer comprises InGaAs, said third semiconductor layer comprises InAlAs, and a composition of each of said layers is selected to produce a lattice match with the InP substrate.
Claim 34
Dependent Claim 63 words
A semiconductor device according to claim 28, wherein said first semiconductor layer is a channel layer of a field-effect transistor, and said fourth semiconductor layer is a source and a drain contact layer, the part of said fourth semiconductor layer which is in contact with said first and second semiconductor layers comprises InGaAs, and a GaAs layer is laminated on said InGaAs layer.
Claim 35
Dependent Claim 96 words
A semiconductor device comprising: a first n-type InGaAs layer; a second undoped or acceptor impurity doped InGaAs layer formed in contact with one side of said first InGaAs layer; an undoped or acceptor impurity doped GaAs layer formed on a side of said second InGaAs layer opposite to said first InGaAs layer; and an n-type semiconductor layer which is a separate body from said first InGaAs layer; wherein said second InGaAs layer acts as a carrier bypass path forming layer, and said separate n-type semiconductor layer is formed in contact with said first second InGaAs layers.
Claim 36
Dependent Claim 96 words
A semiconductor device comprising: a first n-type InGaAs layer; a second undoped or acceptor impurity doped InGaAs layer formed in contact with one side of said first InGaAs layer; an undoped or acceptor impurity doped GaAs layer formed on a side of said second InGaAs layer opposite to said first InGaAs layer; and an n-type semiconductor layer which is a separate body from said first InGaAs layer; wherein said second InGaAs layer acts as a carrier bypass path forming layer, and said separate n-type semiconductor layer is formed in contact with said first second InGaAs layers.
Claim 37
Dependent Claim 96 words
A semiconductor device comprising: a first p-type InGaAs layer; a second undoped or donor impurity doped InGaAs layer formed in contact with one side of said first InGaAs layer; an undoped or donor impurity doped GaAs layer formed on aside of said second InGaAs layer opposite to said first InGaAs layer; and and a p-type semiconductor layer which is separate body from said first InGaAs layer; wherein said second InGaAs layer acts as a carrier bypass path forming layer, and said separated p-type semiconductor layer is formed in contact with said first and second InGaAs layers.
Claim 38
Dependent Claim 96 words
A semiconductor device comprising: a first p-type InGaAs layer; a second undoped or donor impurity doped InGaAs layer formed in contact with one side of said first InGaAs layer; an undoped or donor impurity doped GaAs layer formed on aside of said second InGaAs layer opposite to said first InGaAs layer; and and a p-type semiconductor layer which is separate body from said first InGaAs layer; wherein said second InGaAs layer acts as a carrier bypass path forming layer, and said separated p-type semiconductor layer is formed in contact with said first and second InGaAs layers.

References Cited (Backward Citations)

US4608586A Cited
US4980731A Cited
US5144379A Cited
US5124762A Cited
JPH04321239A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-09-26 1998-03-28 1998-09-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-09-26 2002-03-28 2002-09-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-09-26 2006-03-28 2006-09-27 $7700.00 Window Closed / Lapsed

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