Patent US5345406A successfully refreshed from Google Patents.
US5345406A
Expired / Lapsed
US
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Bandpass sigma delta converter suitable for multiple protocols
Assignee: Quarterhill Inc
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Filing: 1992-08-25
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Granted: 1994-09-06
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Expires: 2012-08-25
Abstract
Abstract Improved integration and simplified construction of direct conversion receivers is achieved by providing selectivity in the early stages of a sigma delta converter to reject adjacent channel signals and thereby allow greater dynamic range for the desired input signals. A bandpass sigma delta converter is taught which is suitable for use with signals having multiple protocols. In a first stage, an aliased input signal is applied to two filters having desired and preferably programmable filter characteristics which provide selectivity to the input signal. A third filter is utilized having a programmable center frequency, which receives as an input signal the sum of the filtered input signal plus the quantization noise of the first stage. This provides a first intermediate output signal of desired selectivity. Quantization noise of the first stage is also applied to a second filter stage which provides a second intermediate output signal having a first component related to the quantization noise of the first stage, and a second component which is the shaped quantization noise of the second stage. The first and second intermediate output signals are combined in order to provide a desired output signal in which the original input signal has been filtered to provide a desired selectivity and converted to a digital signal while the quantization noise of the first stage has been cancelled, and the quantization noise of the second stage has been shaped by a desired function and converted to a digital signal independent of the input signal shaping.
Inventors
- 👤 Tim A. Williams
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:13
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/39; H03M3/392; H03M3/396; H03M3/412; H03M3/414; H03M3/418
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
376 words
A bandpass sigma delta converter comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; a first stage having an inherent quantization noise, comprising: an input port coupled to said input port of said bandpass sigma delta converter in order to receive said input signal; an output port; a first filter network having an input port coupled to said input port of said first stage and an output port coupled to said output port of said first stage for providing a desired selectivity to said input signal in order to cause said converter to provide on said output port of said first stage a first intermediate output signal comprising a selected one of said aliased copies of said desired information signal; a second filter network coupled to said input port of said first stage and to receive said intermediate output signal for providing a component of said first intermediate output signal comprising a shaped value of said inherent quantization noise of said first stage; and a noise output terminal for providing a noise output signal comprising said inherent quantization noise of said first stage; a second stage having an inherent quantization noise, comprising: an input port coupled to said noise output port of said first stage; an output port; and a filter network having an input port coupled to said input port of said second stage and an output port coupled to said output port of said second stage, and providing on said output port of said second stage a second intermediate output signal comprising a first component comprising said inherent quantization noise of said first stage and a second component comprising a shaped value of said inherent quantization noise of said second stage; and a third stage comprising: a first input port coupled to said output port of said first stage; a second input port coupled to said output port of said second stage; and an output port for providing a final output signal comprising a first component of said selected one of said plurality of aliased copies of said information signal with a desired selectivity to reject adjacent channel signals, and a second component of said shaped inherent quantization noise of said second stage.
Claim 2
Dependent Claim
376 words
A bandpass sigma delta converter comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; a first stage having an inherent quantization noise, comprising: an input port coupled to said input port of said bandpass sigma delta converter in order to receive said input signal; an output port; a first filter network having an input port coupled to said input port of said first stage and an output port coupled to said output port of said first stage for providing a desired selectivity to said input signal in order to cause said converter to provide on said output port of said first stage a first intermediate output signal comprising a selected one of said aliased copies of said desired information signal; a second filter network coupled to said input port of said first stage and to receive said intermediate output signal for providing a component of said first intermediate output signal comprising a shaped value of said inherent quantization noise of said first stage; and a noise output terminal for providing a noise output signal comprising said inherent quantization noise of said first stage; a second stage having an inherent quantization noise, comprising: an input port coupled to said noise output port of said first stage; an output port; and a filter network having an input port coupled to said input port of said second stage and an output port coupled to said output port of said second stage, and providing on said output port of said second stage a second intermediate output signal comprising a first component comprising said inherent quantization noise of said first stage and a second component comprising a shaped value of said inherent quantization noise of said second stage; and a third stage comprising: a first input port coupled to said output port of said first stage; a second input port coupled to said output port of said second stage; and an output port for providing a final output signal comprising a first component of said selected one of said plurality of aliased copies of said information signal with a desired selectivity to reject adjacent channel signals, and a second component of said shaped inherent quantization noise of said second stage.
Claim 3
Dependent Claim
23 words
A converter as in claim 1 wherein said final output signal is substantially free from said inherent quantization noise of said first stage.
Claim 4
Dependent Claim
37 words
A converter as in claim 1 wherein said first filter network of said first stage further comprises a frequency select port for receiving a center frequency select signal for establishing a filter center frequency in response thereto.
Claim 5
Dependent Claim
36 words
A converter as in claim 1 wherein said filter network of said second stage further comprises a frequency select port for receiving a center frequency select signal for establishing a filter center frequency in response thereto.
Claim 6
Dependent Claim
230 words
A converter as in claim 1 wherein said first and second filter networks together comprise: a first input filter having an input port coupled to said input port of said first stage, and having an output port; a second input filter having an input port coupled to said input port of said first stage, and having an output port; a third filter network having an input port and an output port; a first adder having a first input port coupled to said output port of said first input filter, a second input port, and an output port coupled to said input port of said third filter network; a second adder having a first input port coupled to said output port of said second input filter, a second input port coupled to said output port of said third filter network, and an output port; a digitizer having an inherent quantization noise, said digitizer having an input lead coupled to said output port of said second adder and an output port coupled to said second input port of said first adder and to said output port of said first stage; and a third adder having an addition input coupled to said output port of said digitizer, a subtraction input coupled to said output port of said second adder, and an output port coupled to said noise output port of said first stage.
Claim 7
Dependent Claim
122 words
A converter as in claim 5 wherein said second stage further comprises: a first adder having a first input coupled to said input port of said second stage, a second input coupled to said output port of said second stage, and an output port coupled to said input port of said filter network of said second stage; a second adder having a first input coupled to said output port of said filter network of said second stage, a second input coupled to said input port of said second stage; and an output port; and a digitizer having an input lead coupled to said output port of said second adder and an output port coupled to said output port of said second stage.
Claim 8
Dependent Claim
188 words
A bandpass sigma delta converter having an inherent quantization noise, comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; an output port; a first filter network having an input port coupled to said input port of said converter and an output port coupled to said output port of said converter for providing a desired selectivity to said input signal in order to cause said converter to provide on said output port of said converter an output signal comprising a selected one of said aliased copies of said desired information signal; a second filter network having a first input port coupled to said input port of said converter, a second input port coupled to receive said output signal, and an output port for providing a component of said signal comprising a shaped value of said inherent quantization noise; and a noise output circuit including a noise output port, said noise output circuit coupled to receive signals from said first and second filter networks and for providing in response thereto a noise output signal comprising said inherent quantization noise.
Claim 9
Dependent Claim
188 words
A bandpass sigma delta converter having an inherent quantization noise, comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; an output port; a first filter network having an input port coupled to said input port of said converter and an output port coupled to said output port of said converter for providing a desired selectivity to said input signal in order to cause said converter to provide on said output port of said converter an output signal comprising a selected one of said aliased copies of said desired information signal; a second filter network having a first input port coupled to said input port of said converter, a second input port coupled to receive said output signal, and an output port for providing a component of said signal comprising a shaped value of said inherent quantization noise; and a noise output circuit including a noise output port, said noise output circuit coupled to receive signals from said first and second filter networks and for providing in response thereto a noise output signal comprising said inherent quantization noise.
Claim 10
Dependent Claim
32 words
A converter as in claim 7 wherein said first filter network comprises a frequency select port for receiving a center frequency select signal for establishing a filter center frequency in response thereto.
Claim 11
Dependent Claim
218 words
A converter as in claim 7 wherein said first filter network comprises: a first input filter having an input port coupled to said input port of said converter and having an output port; a second input filter having an input port coupled to said input port of said converter and having an output port; a first adder having a first input port coupled to said output port of said first input filter, a second input port, and an output port coupled to said first input port of said second filter network; a second adder having a first input coupled to said output port of said second input filter, a second input port coupled to said output port of said second filter network, and an output port; a digitizer having an inherent quantization noise forming at least part of said inherent quantization noise of said converter, said digitizer having a first input lead coupled to said output port of said second adder and an output port coupled to said second input port of said first adder and to said output port; and a third adder having an addition input coupled to said output port of said digitizer, a subtraction input coupled to said output port of said second adder, and an output port coupled to said noise output port.
Claim 12
Dependent Claim
46 words
A converter as in claim 5 wherein said digitizer comprises a comparator having a first input lead coupled to said input lead of said digitizer, a second input lead coupled to a reference voltage, and an output lead coupled to said output port of said digitizer.
Claim 13
Dependent Claim
46 words
A converter as in claim 6 wherein said digitizer comprises a comparator having a first input lead coupled to said input lead of said digitizer, a second input lead coupled to a reference voltage, and an output lead coupled to said output port of said digitizer.
Claim 14
Dependent Claim
46 words
A converter as in claim 9 wherein said digitizer comprises a comparator having a first input lead coupled to said input lead of said digitizer, a second input lead coupled to a reference voltage, and an output lead coupled to said output port of said digitizer.
Claim 15
Dependent Claim
21 words
A converter as in claim 7 wherein said output signal is substantially free from said inherent quantization noise of said converter.
Claim 16
Dependent Claim
469 words
A bandpass sigma delta converter comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; an output port; a plurality of first stages, each first stage having an inherent quantization noise, each first stage comprising: an input port; an output port; a first filter network having an input port coupled to said input port of said first state, and an output port for providing a desired selectivity to a signal being processed by said first filter network in order to cause said first stage to provide on said output port of said first stage a signal of a selected bandwidth; a second filter network coupled to said input port of said first stage and to receive said signal on said output port of said first stage for providing a component of said signal comprising a shaped value of said inherent quantization noise of said first stage; and a noise output circuit including a noise output port, said noise output circuit coupled to receive signals from said first and second filter networks and for providing in response thereto a noise output signal comprising said inherent quantization noise; a second stage having an inherent quantization noise, comprising: an input port; an output port; and a filter network having an input port coupled to said input port of said second stage and an output port coupled to said output port of said second stage, and providing on said output port of said second stage an second intermediate output signal comprising a first component comprising said inherent quantization noise of said first stage and a second component comprising a shaped value of said inherent quantization noise of said second stage; and a third stage comprising: a first set of input ports coupled to one or more of said output ports of said plurality of first stages; a second input port coupled to said output port of said second stage; and an output port coupled to said Output port of said bandpass sigma delta converter for providing a final output signal comprising a first component of said selected one of said plurality of aliased copies of said information signal with a desired selectivity to reject adjacent channel signals, and a second component of said shaped inherent quantization noise of said second stage, said input port of a first one of said plurality of first stages being coupled to said input port of said converter, said noise output port of a last one of said plurality of first stages being coupled to said input port of said second stage, and said input port of said first stages other than said first one of said plurality of first stages being coupled to the noise output port of a preceding one of said plurality of first stages.
Claim 17
Dependent Claim
469 words
A bandpass sigma delta converter comprising: an input port for receiving an input signal comprising a plurality of aliased copies of a desired information signal; an output port; a plurality of first stages, each first stage having an inherent quantization noise, each first stage comprising: an input port; an output port; a first filter network having an input port coupled to said input port of said first state, and an output port for providing a desired selectivity to a signal being processed by said first filter network in order to cause said first stage to provide on said output port of said first stage a signal of a selected bandwidth; a second filter network coupled to said input port of said first stage and to receive said signal on said output port of said first stage for providing a component of said signal comprising a shaped value of said inherent quantization noise of said first stage; and a noise output circuit including a noise output port, said noise output circuit coupled to receive signals from said first and second filter networks and for providing in response thereto a noise output signal comprising said inherent quantization noise; a second stage having an inherent quantization noise, comprising: an input port; an output port; and a filter network having an input port coupled to said input port of said second stage and an output port coupled to said output port of said second stage, and providing on said output port of said second stage an second intermediate output signal comprising a first component comprising said inherent quantization noise of said first stage and a second component comprising a shaped value of said inherent quantization noise of said second stage; and a third stage comprising: a first set of input ports coupled to one or more of said output ports of said plurality of first stages; a second input port coupled to said output port of said second stage; and an output port coupled to said Output port of said bandpass sigma delta converter for providing a final output signal comprising a first component of said selected one of said plurality of aliased copies of said information signal with a desired selectivity to reject adjacent channel signals, and a second component of said shaped inherent quantization noise of said second stage, said input port of a first one of said plurality of first stages being coupled to said input port of said converter, said noise output port of a last one of said plurality of first stages being coupled to said input port of said second stage, and said input port of said first stages other than said first one of said plurality of first stages being coupled to the noise output port of a preceding one of said plurality of first stages.
Claim 18
Dependent Claim
39 words
A converter as in claim 14 wherein said first filter network of at least one of said first stages comprises means for receiving a center frequency select signal and means for providing a filter center frequency in response thereto.
Claim 19
Dependent Claim
233 words
A converter as in claim 14 wherein said first filter network of one or more of said first stages each comprises: a first input filter having an input port coupled to said input port of said first stage and having an output port; a second input filter having an input port coupled to said input port of said first stage and having an output port; a first adder having a first input port coupled to said output port of said first input filter, a second input port, and an output port coupled to said input port of said second filter network; a second adder having a first input port coupled to said output port of said second input filter, a second input port coupled to said output port of said second filter network, and an output port; a digitizer having an inherent quantization noise forming at least part of said inherent quantization noise of said first stage, said digitizer having a first input lead coupled to said output port of said second adder, and an output port coupled to said second input of said first adder and to said output port of said first stage; and a third adder having an addition input coupled to said output port of said digitizer, a subtraction input coupled to said output port of said second adder, and an output port coupled to said noise output port.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1997-09-05 | 1998-03-07 | 1998-09-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-09-05 | 2002-03-07 | 2002-09-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-09-05 | 2006-03-07 | 2006-09-06 | $7700.00 | Window Closed / Lapsed |