Positive feedback low input capacitance differential amplifier

Claim 2

An improved read preamplifier of the type having a differential pair of transistors which act as first and second input transistors to the read preamplifier, having a first current source coupled to each of the first and second input transistors, having a first cascode stage transistor coupled to the first input transistor and a second cascode stage transistor coupled to the second input transistor, the first and second cascode stage transistors providing first and second outputs of the read preamplifier, the read preamplifier also having a first load coupled to the first cascode stage transistor and a second load coupled to the second cascode stage transistor, the improvement comprising: first positive feedback gain control means, coupled between the second load and the first cascode stage transistor, for controlling the gain of the first input transistor and thereby controlling the input capacitance of the first input transistor; and second positive feedback gain control means, coupled between the first load and the second cascode stage transistor, for controlling the gain of the second input transistor and thereby controlling the input capacitance of the second input transistor.

Claim 3

The improved read preamplifier of claim 1, wherein the first positive feedback gain control means includes a first feedback transistor and the second positive feedback gain control means includes a second feedback transistor, wherein the first feedback transistor has a first electrode, a second electrode coupled to the first cascode stage transistor, and a control electrode coupled to the second load, and wherein the second feedback transistor has a first electrode, a second electrode coupled to the second cascode stage transistor, and a control electrode coupled to the first load.

Claim 4

The improved read preamplifier of claim 2 wherein the first positive feedback gain control means further includes a second current source coupled to the second electrode of the first feedback transistor, and the second positive feedback gain control means further includes a third current source coupled to the second electrode of the second feedback transistor.

Claim 5

The improved read preamplifier of claim 1, the improvement further comprising: a first frequency compensation capacitor coupled between the first input stage transistor and the second cascode stage transistor, for improving preamplifier stability at high frequencies; and a second frequency compensation capacitor coupled between the second input stage transistor and the first cascode stage transistor, for improving preamplifier stability at high frequencies.

Claim 6

The improved read preamplifier of claim 1, the improvement further comprising: a first frequency compensation capacitor coupled between a first electrode of the first cascode stage transistor and a control electrode of the first cascode stage for transistor, improving preamplifier stability at high frequencies; and a second frequency compensation capacitor coupled between a first electrode of the second cascode stage transistor and a control electrode of the second cascode stage transistor, for improving preamplifier stability at high frequencies.

Claim 7

An improved read preamplifier of the type having a differential pair of transistors which act as first and second input transistors to the read preamplifier, having a first current source coupled to each of the first and second input transistors, having a first cascode stage transistor coupled to the first input transistor and a second cascode stage transistor coupled to the second input transistor, the first and second cascode stage transistors providing first and second outputs of the read preamplifier, the read preamplifier also having a first load coupled to the first cascode stage transistor and a second load coupled to the second cascode stage transistor, the improvement comprising: means for establishing a positive gain for the first and second input transistors comprising: a first feedback transistor having a first electrode, a second electrode coupled to the first cascode stage transistor, and a control electrode coupled to the second load; a second feedback transistor having a first electrode, a second electrode coupled to the second cascode stage transistor, and a control electrode coupled to the first load; a second current source coupled to the second electrode of the first feedback transistor; and a third current source coupled to the second electrode of the second feedback transistor.

Claim 8

An improved read preamplifier of the type having a differential pair of transistors which act as first and second input transistors to the read preamplifier, having a first current source coupled to each of the first and second input transistors, having a first cascode stage transistor coupled to the first input transistor and a second cascode stage transistor coupled to the second input transistor, the first and second cascode stage transistors providing first and second outputs of the read preamplifier, the read preamplifier also having a first load coupled to the first cascode stage transistor and a second load coupled to the second cascode stage transistor, the improvement comprising: means for establishing a positive gain for the first and second input transistors comprising: a first feedback transistor having a first electrode, a second electrode coupled to the first cascode stage transistor, and a control electrode coupled to the second load; a second feedback transistor having a first electrode, a second electrode coupled to the second cascode stage transistor, and a control electrode coupled to the first load; a second current source coupled to the second electrode of the first feedback transistor; and a third current source coupled to the second electrode of the second feedback transistor.

Claim 9

The improved read preamplifier of claim 6, the improvement further comprising: a first frequency compensation capacitor coupled between the first input stage transistor and the second cascode stage transistor and the second cascode stage transistor, for improving preamplifier stability at high frequencies; and a second frequency compensation capacitor coupled between the second input stage transistor and the first cascode stage transistor, for improving preamplifier stability at high frequencies.

Claim 10

The improved read preamplifier of claim 6, the improvement further comprising: a first frequency compensation capacitor coupled between a first electrode of the first cascode stage transistor and a control electrode of the first cascode stage transistor, for improving preamplifier stability at high frequencies; and a second frequency compensation capacitor coupled between a first electrode of the second cascode stage transistor and a control electrode of the second cascode stage transistor, for improving preamplifier stability at high frequencies.

Claim 11

A read differential preamplifier for use in reading data in a magnetic storage system, the read differential preamplifier comprising: first and second voltage supply terminals; a first current source coupled to the second voltage supply terminal; a first input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a first input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a first current path; a second input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a second input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a second current path; a first output stage transistor having a first electrode coupled to the first voltage supply terminal through a first resistor, the first electrode acting as a first differential preamplifier output, a second electrode coupled to the first electrode of the first input stage transistor, and a control electrode for receiving a first positive feedback signal, the first positive feedback signal controlling the input capacitance of the first input stage transistor, wherein the first and second electrodes of the first output stage transistor are connected in series with the first and second electrodes of the first input stage transistor and with the first resistor to form a portion of the first current path; a second output stage transistor having a first electrode coupled to the first voltage supply terminal through a second resistor, the first electrode acting as a second differential preamplifier output, a second electrode coupled to the first electrode of the second input stage transistor, and a control electrode for receiving a second positive feedback signal, the second positive feedback signal controlling the input capacitance of the second input stage transistor, wherein the first and second electrodes of the second output stage transistor are connected in series with the first and second electrodes of the second input stage transistor and with the second resistor to form a portion of the second current path; first control means coupled to the control electrode of the first output stage transistor for providing the first positive feedback signal as a function of a first input signal at the first input to the differential preamplifier to control the input capacitance of the first input stage transistor so that the differential preamplifier maximum read data rate increases; and second control means coupled to the control electrode of the second output stage transistor for providing the second positive feedback signal as a function of a second input signal at the second input to the differential preamplifier to control the input capacitance of the second input stage transistor so that the differential preamplifier maximum read data rate increases.

Claim 12

A read differential preamplifier for use in reading data in a magnetic storage system, the read differential preamplifier comprising: first and second voltage supply terminals; a first current source coupled to the second voltage supply terminal; a first input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a first input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a first current path; a second input stage transistor having a first electrode, a second electrode coupled to the first current source, and a control electrode which acts as a second input to the differential preamplifier, wherein the first and second electrodes are connected in series and form a portion of a second current path; a first output stage transistor having a first electrode coupled to the first voltage supply terminal through a first resistor, the first electrode acting as a first differential preamplifier output, a second electrode coupled to the first electrode of the first input stage transistor, and a control electrode for receiving a first positive feedback signal, the first positive feedback signal controlling the input capacitance of the first input stage transistor, wherein the first and second electrodes of the first output stage transistor are connected in series with the first and second electrodes of the first input stage transistor and with the first resistor to form a portion of the first current path; a second output stage transistor having a first electrode coupled to the first voltage supply terminal through a second resistor, the first electrode acting as a second differential preamplifier output, a second electrode coupled to the first electrode of the second input stage transistor, and a control electrode for receiving a second positive feedback signal, the second positive feedback signal controlling the input capacitance of the second input stage transistor, wherein the first and second electrodes of the second output stage transistor are connected in series with the first and second electrodes of the second input stage transistor and with the second resistor to form a portion of the second current path; first control means coupled to the control electrode of the first output stage transistor for providing the first positive feedback signal as a function of a first input signal at the first input to the differential preamplifier to control the input capacitance of the first input stage transistor so that the differential preamplifier maximum read data rate increases; and second control means coupled to the control electrode of the second output stage transistor for providing the second positive feedback signal as a function of a second input signal at the second input to the differential preamplifier to control the input capacitance of the second input stage transistor so that the differential preamplifier maximum read data rate increases.

Claim 13

The read differential preamplifier of claim 9 wherein the first and second positive feedback signals control the input capacitances of the first and second input stage transistors by controlling gain of the first and second input stage transistors.

Claim 14

The read differential preamplifier of claim 9 wherein the first and second control means control the first and second positive feedback signals, respectively, to establish a positive gain between the control electrode and the first electrode of the first input stage transistor and between the control electrode and the first electrode of the second input stage transistor.

Claim 15

The read differential preamplifier of claim 9 wherein the first and second control means comprise first and second positive feedback circuits.

Claim 16

The read differential preamplifier of claim 9 and further comprising: a third resistor coupled in series between the first resistor and the first electrode of the first output stage transistor, the third resistor forming a portion of the first current path; and a fourth resistor coupled in series between the second resistor and the first electrode of the second output stage transistor, the fourth resistor forming a portion of the second current path.

Claim 17

The read differential preamplifier of claim 13, wherein the first control means comprises: a first feedback current source coupled to the second voltage supply terminal; and a first feedback transistor having a first electrode coupled to a connection between the first resistor and the third resistor, a second electrode coupled to the first feedback current source and to the control electrode of the first output stage transistor, and a control electrode coupled to a connection between the second resistor and the fourth resistor.

Claim 18

The read differential preamplifier of claim 14, wherein the second control means comprises: a second feedback current source coupled to the second voltage supply terminal; and a second feedback transistor having a first electrode coupled to a connection between the second resistor and the fourth resistor, a second electrode coupled to the second feedback current source and to the control electrode of the second output stage transistor, and a control electrode coupled to a connection between the first resistor and the third resistor.

Claim 19

The read preamplifier of claim 9 and further comprising: a first frequency compensation capacitor coupled between the first electrode of the first input stage transistor and the first electrode of the second output stage transistor, for providing positive feedback to the first electrode of the first input stage transistor at high frequencies; and a second frequency compensation capacitor coupled between the first electrode of the second input stage transistor and the first electrode of the first output stage transistor, for providing positive feedback to the first electrode of the second input stage transistor at high frequencies.

Claim 20

The read preamplifier of claim 9 and further comprising: a first frequency compensation capacitor coupled between the first electrode and the control electrode of the first output stage transistor, for providing preamplifier stability at high frequencies; and a second frequency compensation capacitor coupled between the first electrode and the control electrode of the second output stage transistor, for providing preamplifier stability at high frequencies.