US5340769A
Expired / Lapsed
US
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Method for manufacturing semiconductor device having groove-structured isolation
Assignee: NEC Corp
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Filing: 1993-11-26
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Granted: 1994-08-23
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Expires: 2013-11-26
Abstract
Abstract A conductive layer is formed on a semiconductor substrate, and is etched so that a side face of the conductive layer is reversely-tapered. Also, a sidewall insulating layer is formed on the side face of the conductive layer. Then, a groove is formed within the semiconductor substrate with a mask of the sidewall insulating layer, and an isolation insulating layer is buried within the groove.
Inventors
- 👤 Hidenobu Miyamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 02:35
CPC Classifications
H; H10; H10B; H10B20/00; H10B20/27; H10B20/30; H10B20/38; H10B20/383; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2923; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; Y; Y10; Y10S; Y10S148/00; Y10S148/05; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
223 words
A method for manufacturing a semiconductor device, comprising the steps of: forming a gate insulating layer on a semiconductor substrate of a first conductivity type; forming a first conductive layer on said gate insulating layer; forming a mask insulating layer on said first conductive layer; forming a photoresist pattern layer on said mask insulating layer; etching said mask insulating layer and said first conductive layer with a mask of said photoresist pattern layer, so that a side face of said first conductive layer is reversely-tapered; removing said photoresist pattern layer; forming a sidewall insulating layer on a side face of said mask insulating layer and said first conductive layer simultaneously with removing a part of said gate insulating layer where said first conductive layer and said sidewall insulating layer are not located; etching said semiconductor substrate with a mask of said mask insulating layer and said sidewall insulating layer, to create a groove within said semiconductor substrate; burying an isolation insulating layer within said groove; forming a second conductive layer on said isolation insulating layer and said first conductive layer; etching said first and second conductive layers with a predetermined pattern mask; and introducing impurities of a second conductive type opposite to the first conductive type into said semiconductor substrate, to create a source region and a drain region within said semiconductor substrate.
Claim 2
Independent Claim
223 words
A method for manufacturing a semiconductor device, comprising the steps of: forming a gate insulating layer on a semiconductor substrate of a first conductivity type; forming a first conductive layer on said gate insulating layer; forming a mask insulating layer on said first conductive layer; forming a photoresist pattern layer on said mask insulating layer; etching said mask insulating layer and said first conductive layer with a mask of said photoresist pattern layer, so that a side face of said first conductive layer is reversely-tapered; removing said photoresist pattern layer; forming a sidewall insulating layer on a side face of said mask insulating layer and said first conductive layer simultaneously with removing a part of said gate insulating layer where said first conductive layer and said sidewall insulating layer are not located; etching said semiconductor substrate with a mask of said mask insulating layer and said sidewall insulating layer, to create a groove within said semiconductor substrate; burying an isolation insulating layer within said groove; forming a second conductive layer on said isolation insulating layer and said first conductive layer; etching said first and second conductive layers with a predetermined pattern mask; and introducing impurities of a second conductive type opposite to the first conductive type into said semiconductor substrate, to create a source region and a drain region within said semiconductor substrate.
Claim 3
Dependent Claim
18 words
A method as set forth in claim 1, wherein said first conductive layer is made of polycrystalline silicon.
Claim 4
Dependent Claim
48 words
A method as set forth in claim 1, wherein said sidewall insulating layer forming step includes the steps of: forming a non-doped silicon dioxide layer on said mask insulating layer and said first conductive layer; and etching back said non-doped silicon dioxide layer and said gate insulating layer.
Claim 5
Dependent Claim
81 words
A method as set forth in claim 1, wherein said isolation insulating layer forming step includes the steps of: forming a silicate glass layer on said mask insulating layer, said sidewall insulating layer, and said semiconductor substrate within said groove; forming a phosphorus-doped silicate glass layer on said silicate glass layer; reflowing said phosphorus-doped silicate glass layer by a heat treatment; and etching said silicate glass layer and said phosphorus-doped silicate glass layer, so that said first conductive layer is exposed.
Claim 6
Dependent Claim
21 words
A method as set forth in claim 1, wherein said second conductive layer is made of high melting temperature metal silicide.
Claim 7
Independent Claim
279 words
A method for manufacturing a semiconductor device, comprising the steps of: forming a first insulating layer formed on a semiconductor substrate of a first conductivity type; forming a first conductive layer on said first insulating layer; forming a second insulating layer on said first conductive layer; forming a second conductive layer on said second insulating layer; forming a third insulating layer on said second conductive layer; forming a photoresist pattern layer on said third insulating layer; etching said third insulating layer, said second conductive layer, said second insulating layer and said first conductive layer with a mask of said photoresist pattern layer, so that a side face of said second conductive layer and a side face of said first conductive layer are reversely-tapered; removing said photoresist pattern layer; forming a sidewall insulating layer on a side face of said third insulating layer, said second conductive layer, said second insulating layer and said first conductive layer simultaneously while removing a part of said first insulating layer where said first conductive layer and said sidewall insulating layer are not located; etching said semiconductor substrate with a mask of said third insulating layer and said sidewall insulating layer, to create a groove within said semiconductor substrate; burying an isolation insulating layer within said groove; removing said second conductive layer and said second insulating layer; forming a third conductive layer on said isolation insulating layer and said first conductive layer; etching said first and second conductive layers with a predetermined pattern mask; and introducing impurities of a second conductive type opposite to the first conductive type into said semiconductor substrate, to create a source region and a drain region within said semiconductor substrate.
Claim 8
Independent Claim
279 words
A method for manufacturing a semiconductor device, comprising the steps of: forming a first insulating layer formed on a semiconductor substrate of a first conductivity type; forming a first conductive layer on said first insulating layer; forming a second insulating layer on said first conductive layer; forming a second conductive layer on said second insulating layer; forming a third insulating layer on said second conductive layer; forming a photoresist pattern layer on said third insulating layer; etching said third insulating layer, said second conductive layer, said second insulating layer and said first conductive layer with a mask of said photoresist pattern layer, so that a side face of said second conductive layer and a side face of said first conductive layer are reversely-tapered; removing said photoresist pattern layer; forming a sidewall insulating layer on a side face of said third insulating layer, said second conductive layer, said second insulating layer and said first conductive layer simultaneously while removing a part of said first insulating layer where said first conductive layer and said sidewall insulating layer are not located; etching said semiconductor substrate with a mask of said third insulating layer and said sidewall insulating layer, to create a groove within said semiconductor substrate; burying an isolation insulating layer within said groove; removing said second conductive layer and said second insulating layer; forming a third conductive layer on said isolation insulating layer and said first conductive layer; etching said first and second conductive layers with a predetermined pattern mask; and introducing impurities of a second conductive type opposite to the first conductive type into said semiconductor substrate, to create a source region and a drain region within said semiconductor substrate.
Claim 9
Dependent Claim
20 words
A method as set forth in claim 6, wherein said first and second conductive layers are made of polycrystalline silicon.
Claim 10
Dependent Claim
56 words
A method as set forth in claim 6, wherein said sidewall insulating layer forming step includes the steps of: forming a non-doped silicon dioxide layer on said third insulating layer, said second conductive layer, said second insulating layer and said first conductive layer; and etching back said non-doped silicon dioxide layer and said first insulating layer.
Claim 11
Dependent Claim
83 words
A method as set forth in claim 6, wherein said isolation insulating layer forming step includes the steps of: forming a silicate glass layer on said mask insulating layer, said sidewall insulating layer, and said semiconductor substrate within said groove; forming a phosphorus-doped silicate glass layer on said silicate glass layer; reflowing said phosphorus-doped silicate glass layer by a heat treatment; and etching said silicate glass layer and said phosphorus-doped silicate glass layer, so that said first and second conductive layers are exposed.
Claim 12
Dependent Claim
21 words
A method as set forth in claim 6, wherein said third conductive layer is made of high melting temperature metal silicide.
References Cited (Backward Citations)
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