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US5338959A
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Thin film transistor with three dimensional multichannel structure
Assignee: Samsung Electronics Co Ltd
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Filing: 1993-03-30
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Granted: 1994-08-16
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Expires: 2013-03-30
Abstract
Abstract A thin film transistor gate structure with a three-dimensional multichannel structure is disclosed. The thin film transistor gate structure according to the present invention comprises source/drain electrodes formed so as to be spaced from and opposite to each other on a substrate; semiconductive layers, comprised of a plurality of sub-semiconductive layers, each formed in a row, each end of the sub-semiconductive layers being in ohmic-contact with the source/drain electrodes; gate insulating layers surrounding each of the semiconductive layers; and gate electrodes surrounding each of the gate insulating layers. Accordingly, the whole outerlayers of each sub-semiconductive layer surrounded by the gate electrodes serve as channel regions. As a result, the effective channel area increases, thereby improving the channel conductance and current driving ability.
Inventors
- 👤 Weonkeun Kim
- 👤 Chulsoo Kim
- 👤 Jeongin Han
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 17:32
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/62; H10D30/01; H10D30/021; H10D30/024; H10D30/67; H10D30/6729; H10D30/673; H10D30/6733; H10D30/6734; H10D30/6735; H10D30/674
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
75 words
A thin film transistor gate structure comprising: (a) a substrate; (b) a plurality of spaced apart semiconductive strips formed substantially parallel to one another and to said substrate, each said strip having a channel portion; (c) a gate insulating layer surrounding a cross-sectional periphery of each said channel portion of each said semiconductive strip; and (d) a gate electrode surrounding said gate insulating layer, a portion of said gate electrode being disposed on said substrate.
Claim 2
Dependent Claim
75 words
A thin film transistor gate structure comprising: (a) a substrate; (b) a plurality of spaced apart semiconductive strips formed substantially parallel to one another and to said substrate, each said strip having a channel portion; (c) a gate insulating layer surrounding a cross-sectional periphery of each said channel portion of each said semiconductive strip; and (d) a gate electrode surrounding said gate insulating layer, a portion of said gate electrode being disposed on said substrate.
Claim 3
Dependent Claim
22 words
A thin film transistor gate structure as set forth in claim 1, wherein said gate electrode comprises upper and lower electrode portions.
Claim 4
Dependent Claim
23 words
A thin film transistor gate structure as set forth in claim 2, wherein said gate insulating layer comprises upper and lower insulating portions.
Claim 5
Dependent Claim
22 words
A thin film transistor gate structure as set forth in claim 1, wherein a cross-section of each said semiconductive strip is polygonal.
Claim 6
Dependent Claim
25 words
A thin film transistor gate structure as set forth in claim 1, wherein a cross-section of each said semiconductive strip channel portion is substantially circular.
Claim 7
Dependent Claim
32 words
A thin film transistor gate structure as set forth in claim 1, wherein a thickness of each said semiconductive strip channel portion is thicker than an effective channel thickness of the transistor.
Claim 8
Dependent Claim
32 words
The thin film transistor gate structure as set forth in claim 1, wherein the thickness of each said semiconductive strip channel portion is equal to an effective channel thickness of the transistor.
Claim 9
Dependent Claim
21 words
The thin film transistor gate structure as set forth in claim 1, wherein said semiconductive strips are formed of polycrystalline silicon.
Claim 10
Dependent Claim
26 words
The thin film transistor gate structure as set forth in claim 1, wherein said substrate is made from a material through which light can be transmitted.
Claim 11
Dependent Claim
33 words
A thin film transistor gate structure as set forth in claim 1, wherein said substrate is made from a material selected from the group consisting of glass, quartz, amorphous, silicon, or crystalline silicon.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-15 | 1998-02-14 | 1998-08-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-15 | 2002-02-14 | 2002-08-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-15 | 2006-02-14 | 2006-08-16 | $7700.00 | Window Closed / Lapsed |