US5334962A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-speed data supply pathway systems
Assignee: Q Dot Inc
•
Filing: 1990-05-29
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Granted: 1994-08-02
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Expires: 2010-05-29
Abstract
Abstract The high speed data pathway system is used to convey data signals to integrated circuits connected to mother and daughter boards. The integrated circuits include a package and an integrated circuit chip carried by the package. An internal transmission line is carried by the package and coupled to the integrated circuit chip. The package includes both input and output connections for the internal transmission line. A high speed pathway is formed by serially connecting the internal transmission lines with external transmission lines to form a unified transmission medium. Advantageously, the internal transmission lines, external transmission lines and the connection between them have substantially corresponding characteristic impedances.
Inventors
- 👤 Brian P. Higgins
- 👤 David W. Gardner
- 👤 Kerry D. Rhea
- 👤 Thomas E. Linnenbrink
- 👤 Rebecca S. Reed
- 👤 Peter C. T. Roberts
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 23:52
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4097; H; H10; H10W; H10W72/00; H10W72/851; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
90 words
A very fast electrical data transmission pathway for connecting to at least one high speed integrated circuit comprising an integrated circuit chip carried by an integrated circuit package, said pathway comprising: a plurality of differential transmission lines external to the integrated circuit package; at least one continuous internal transmission line extending through said integrated circuit package; means for connecting said integrated circuit chip to said internal transmission line; and means for connecting said internal transmission line in electrical series with at least two of said plurality of differential transmission lines.
Claim 2
Dependent Claim
90 words
A very fast electrical data transmission pathway for connecting to at least one high speed integrated circuit comprising an integrated circuit chip carried by an integrated circuit package, said pathway comprising: a plurality of differential transmission lines external to the integrated circuit package; at least one continuous internal transmission line extending through said integrated circuit package; means for connecting said integrated circuit chip to said internal transmission line; and means for connecting said internal transmission line in electrical series with at least two of said plurality of differential transmission lines.
Claim 3
Dependent Claim
20 words
A data pathway in accordance with claim 1 wherein said integrated circuit chip is a gallium arsenide passive receiver circuit.
Claim 4
Dependent Claim
21 words
A data pathway in accordance with claim 1 wherein said integrated circuit chip is an active gallium arsenide tristate transceiver circuit.
Claim 5
Dependent Claim
18 words
A data pathway in accordance with claim 1 wherein said differential transmission lines each comprise coaxial transmission means.
Claim 6
Dependent Claim
93 words
A data pathway in accordance with claim 1 wherein said differential transmission lines are carried by a circuit board and said internal transmission line extends through said integrated circuit package between an input terminal and an output terminal thereof; and said means for connecting said internal transmission line with said differential transmission lines comprises means for connecting the input terminal to one of said plurality of differential transmission lines at said circuit board and means for connecting the output terminal to another of said plurality of differential transmission lines at said circuit board.
Claim 7
Dependent Claim
42 words
A data pathway in accordance with claim 5 wherein each of said plurality of differential transmission lines has a substantially equal characteristic impedance and said internal transmission line has an impedance substantially corresponding to the characteristic impedance of the differential transmission lines.
Claim 8
Dependent Claim
31 words
A data pathway in accordance with claim 6 wherein the input terminal and the output terminal each have an impedance substantially corresponding to the characteristic impedance of the differential transmission lines.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-01 | 1998-01-31 | 1998-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-01 | 2002-01-31 | 2002-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-01 | 2006-01-31 | 2006-08-02 | $7700.00 | Window Closed / Lapsed |