Patent US5328854A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5328854A Expired / Lapsed US ⏱️ 0.0 years remaining

Fabrication of electronic devices with an internal window

Assignee: Nokia Bell Labs
•
Filing: 1993-03-31
•
Granted: 1994-07-12
•
Expires: 2013-03-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A process is described of producing devices, such as vertical cavity surface emitting lasers or resonant cavity light emitting devices, with an insulating region between an active region and top electrode, the insulating region having a centrally located window permitting passage of the electric current from the top electrode to the bottom electrode centrally of the active region. The insulating region is formed by ion implantation. The window is defined by a photoresist mask formed by angle etching a photoresist masking layer by RIE, so as to form the mask with parallel side walls inclined at an angle to the normal to the masked surface. The ion implantation is conducted at the same angle and parallel to the side walls of the of the mask. This permits fabrication of devices individually or in arrays. An exemplary independently addressable top emitting 8×18 VCSEL array (VCSELA) with GaAs multi-quantum well gain region was fabricated with excellent properties using the angle etched masks. The typical threshold current and voltage of the exemplary devices in this array are approximately 4 mA and 2.65 V respectively. The L-I-V characteristics of the devices do not change by current annealing. Also, a comparison between devices produced by using the novel angled implantation mask and devices produced by using conventional lithography implantation mask indicates the importance of the implantation mask preparation on the final VCSEL operating characteristics.

Inventors

  • 👤 Daryoosh Vakhshoori
  • 👤 James D. Wynn
  • 👤 George J. Zydzik

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 03:35
CPC Classifications
H; H10; H10H; H10H20/00; H10H20/01; H10H20/011; H10H20/013; H01; H01S; H01S5/00; H01S5/02; H01S5/0201; H01S5/10; H01S5/18; H01S5/183; H01S5/18308; H01S5/18322; H01S5/18327; H01S5/20; H01S5/2054; H01S5/2059; H01S5/2063; H01S5/40; H01S5/42; H01S5/423

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 148 words
A method of manufacturing electronic devices having internal windows in an insulating, ion implanted region, the device including a semiconductor structure and a top and a bottom metal electrode to the structure, which comprises: depositing on the top surface of the top electrode a photoresist layer in a thickness sufficient to prevent implantation ions from reaching semiconductor material underlying the top electrode, patterning the photoresist layer, and implanting proton ions into said semiconductor material, forming an insulating region with a centrally located window, wherein said photoresist layer is patterned by angle etching with reactive ion etching (RIE) to produce a masking pattern side walls of which are inclined a preselected angle with respect to a normal to said top surface and which are parallel each to another, and said implanting of the ions is conducted at an angle directed parallel to the side walls of the photoresist pattern.
Claim 2
Independent Claim 148 words
A method of manufacturing electronic devices having internal windows in an insulating, ion implanted region, the device including a semiconductor structure and a top and a bottom metal electrode to the structure, which comprises: depositing on the top surface of the top electrode a photoresist layer in a thickness sufficient to prevent implantation ions from reaching semiconductor material underlying the top electrode, patterning the photoresist layer, and implanting proton ions into said semiconductor material, forming an insulating region with a centrally located window, wherein said photoresist layer is patterned by angle etching with reactive ion etching (RIE) to produce a masking pattern side walls of which are inclined a preselected angle with respect to a normal to said top surface and which are parallel each to another, and said implanting of the ions is conducted at an angle directed parallel to the side walls of the photoresist pattern.
Claim 3
Dependent Claim 46 words
The method of claim 1, in which said photoresist layer is patterned in the form of dots of photoresist, having side walls parallel each to another and sloping said angle relative to a plane normal to the plane of the top surface of the top electrode.
Claim 4
Dependent Claim 87 words
The method of claim 1, in which said photoresist mask is produced by depositing a thick photoresist layer on top of the metal electrode, depositing a spin-on-glass layer on top of the photoresist layer, depositing a thin photoresist layer on top of the spin-on-glass layer, patterning the thin photoresist layer by conventional lithography into a desired pattern, and transferring said pattern to the spin-on-glass layer by etching in a CF 4 /O 2 plasma and then to the thick photoresist layer by Oxygen Reactive Ion Etching (RIE).
Claim 5
Dependent Claim 49 words
The method of claim 2, in which, prior to said RIE step, the top surface of the device is arranged at an angle relative to a normal to parallel plates of a RIE oxygen system, said angle corresponding with an angle of implantation at a subsequent ion implantation step.
Claim 6
Dependent Claim 27 words
The method of claim 1, in which said angle is within a range of from 5 to 10 degrees relative to the normal to said top surface.
Claim 7
Dependent Claim 12 words
The method of claim 5, in which said angle is 7 degrees.
Claim 8
Dependent Claim 59 words
The method of claim 3, in which said metal electrode has an aperture for the passage of radiation emission therethrough, and in which, prior to the deposition of the thick photoresist layer, an SiO 2 layer approximately λ/2 thick is deposited on top of the metal electrode and on a surface of the semiconductor structure exposed in the aperture.
Claim 9
Dependent Claim 18 words
The method of claim 7, in which said exposed surface is a surface of a semiconductor contact layer.
Claim 10
Dependent Claim 26 words
The method of claim 1, in which said device is selected from vertical cavity surface emitting lasers (VCSELs) and from resonant cavity light emitting diodes (RCLEDs).
Claim 11
Dependent Claim 51 words
The method of claim 1, in which said device is a VCSEL, the semiconductor structure of which includes multi-quantum wells, active top and bottom confining layers, and DBR top and bottom mirrors, and said insulating region is formed by said implantation of ions into peripheral areas of the top DBR mirror.
Claim 12
Dependent Claim 21 words
The method of claim 10, in which a plurality of these VCSELs is arranged into an array of individually addressable VCSELs.

References Cited (Backward Citations)

US3908262A Cited
US5185290A Cited
JPH0384924A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-07-11 1998-01-10 1998-07-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-07-11 2002-01-10 2002-07-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-07-11 2006-01-10 2006-07-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag