Image processing with a multiple-memory apparatus

Claim 2

An image processing apparatus comprising: receiving means for receiving digitized image data; storage means for storing the received image data in such a manner that said storage means divides the received image data into a plurality of memory regions; read means for simultaneously reading the image data stored in each of said plurality of memory regions; and supply means for supplying the image data which have been simultaneously read out to a vertical digital filtering process, wherein said read means includes read control means for controlling the reading in such a manner that the image data simultaneously read from said plurality of memory regions are arranged in the same sequential order in the sub-scanning direction as the sequential order when the image data has been received by said receiving means.

Claim 3

An image processing apparatus according to claim 1, wherein said receiving means includes means for forming the digitized image data by synthesizing brightness signals representing the corresponding color components into one series line signal.

Claim 4

An image processing apparatus according to claim 2, wherein the horizontal period of the digitized image data is substantially the same as the horizontal period of each of said brightness signals corresponding to the color components.

Claim 5

An image processing apparatus comprising: receiving means for receiving digitized image data; storage means for storing the received image data in such a manner that said storage means divides the received image data into a plurality of memory regions; read means for simultaneously reading the image data stored in each of said plurality of memory regions; and supply means for supplying the image data which have been simultaneously read out to a vertical digital filtering process, wherein said each of memory regions further comprises: line memory means for storing the received image data for a plurality of lines; first generating means for generating a write address signal to be supplied to said line memory means; second generating means for generating a read address signal to be supplied to said line memory means; third generating means for generating a horizontal address signal when said write address signal or said read address signal has been generated, wherein said third means outputs a carry signal at a predetermined period; and fourth generating means for generating a vertical address signal in response to said carry signal outputted from said third generating means, said fourth generating means controlling the generation of said vertical address signal in response to a command issued from an external equipment.

Claim 6

An image processing apparatus comprising: receiving means for receiving digitized image data; storage means for storing the received image data in such a manner that said storage means divides the received image data into a plurality of memory regions; read means for simultaneously reading the image data stored in each of said plurality of memory regions; and supply means for supplying the image data which have been simultaneously read out to a vertical digital filtering process, wherein said each of memory regions further comprises: line memory means for storing the received image data for a plurality of lines; first generating means for generating a write address signal to be supplied to said line memory means; second generating means for generating a read address signal to be supplied to said line memory means; third generating means for generating a horizontal address signal when said write address signal or said read address signal has been generated, wherein said third means outputs a carry signal at a predetermined period; and fourth generating means for generating a vertical address signal in response to said carry signal outputted from said third generating means, said fourth generating means controlling the generation of said vertical address signal in response to a command issued from an external equipment.

Claim 7

An image processing apparatus according to claim 4, wherein the fourth generating means includes mask means for masking the carry signal in response to a mask signal supplied from said external equipment.

Claim 8

An image processing apparatus according to claim 4, wherein said read means includes read control means for controlling the reading in such a manner that the image data simultaneously read from said plurality of memory regions are arranged in the same sequential order in the sub-scanning direction as the sequential order when the image data has been received by said receiving means.

Claim 9

An image processing apparatus according to claim 6, wherein said read control means includes repeat means for repeatedly reading the same image data.

Claim 10

An image processing apparatus according to claim 7, wherein said repeat means repeatedly reads the same image data by at least the number corresponding to the number of said memory regions.

Claim 11

An image processing apparatus according to claim 4, wherein said receiving means includes means for forming the digitized image data by synthesizing brightness signals representing the corresponding color components into one series line signal.

Claim 12

An image processing apparatus according to claim 9, wherein the horizontal period of the digitized image data is substantially the same as the horizontal period of each of the brightness signals corresponding to the color components.

Claim 13

An image processing apparatus according to claim 1, wherein said read control means includes repeat means for repeatedly reading the same image data.

Claim 14

An image processing apparatus according to claim 11, wherein said repeat means repeatedly reads the same image data by at least the number corresponding to the number of said memory regions.