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US5321704A Expired / Lapsed US ⏱️ 0.0 years remaining

Error detection structure and method using partial polynomial check

Assignee: Xilinx Inc
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Filing: 1991-01-16
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Granted: 1994-06-14
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Expires: 2011-01-16
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Abstract

Abstract The present invention provides a means and method of generating a long error checking polynomial remainder having the ability to detect errors with high reliability and inserting only a subset of the polynomial remainder periodically into a data stream, then at the receiving end recalculating the polynomial remainder and checking the inserted subset for errors. The polynomial has the property that the current remainder value is a function of all data previously transmitted in a transmission session. The subset transmitted also preferably has this property. A longer subset of the polynomial remainder, or the full polynomial remainder, may be inserted less frequently, and is preferably sent and tested at the end of the transmission session.

Inventors

  • 👤 Charles R. Erickson
  • 👤 Philip M. Freidin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 05:00
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/03; H03M13/05; H03M13/09; H03M13/091; G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10

Claims Analysis

Total Claims: 28
Claim 1
Independent Claim 242 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received; in which said means for generating a transmit end error checkword comprising a first means for generating a transmit end error checkword and further comprising: at least a second means for generating a transmit end error checkword; and means for selecting from said first and second transmit end error checkwords.
Claim 2
Dependent Claim 242 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received; in which said means for generating a transmit end error checkword comprising a first means for generating a transmit end error checkword and further comprising: at least a second means for generating a transmit end error checkword; and means for selecting from said first and second transmit end error checkwords.
Claim 3
Dependent Claim 92 words
Structure for detecting an error as in claim 1, in which said means for generating a transmit end error checkword is a CRC polynomial shift register having a plurality of XOR gates, each of which receives on one input lead the output from one stage of said shift register and provides an output which is input to a next stage of said shirt register; and means for selecting between applying a logical zero and a function of bits in said data stream to the other lead of each of said XOR gates.
Claim 4
Dependent Claim 57 words
Structure for detecting an error as in claim 1 in which one of said means for generating a transmit end error checkword is a CRC polynomial shift register and another of said means for generating a transmit end error checkword is means for detecting a selected string of bits at a particular location in said data stream.
Claim 5
Dependent Claim 55 words
Structure as in claim 1 in which said means for selecting from said first and second means for generating comprises a control register, said control register being located from said stream of bits and providing a select output, said select output controlling a multiplexer into which are input a plurality of alternative error detecting results.
Claim 6
Dependent Claim 76 words
Structure for detecting an error as in claim 1 in which said means for generating a transmit end error checkword is a CRS polynomial shift register having a plurality of XOR gates, each of which receives on one input lead the output from one stage of said shift register and provides an output which is input to a next stage of said shift register; and means for resetting said shift register to hold an initial value.
Claim 7
Dependent Claim 137 words
Method for detecting an error in a stream of data bits comprising the steps of: at a transmit end: generating from each successive data bit in said stream of data bits a transmit end error checkword, said transmit end error checkword having the property that a subset of said transmit end error checkword is a function of all previous bits in said stream of data bits; periodically forming transmission blocks each comprising a frame of data from said upstream of data bits and said subset of said transmit end error checkword; and transmitting each of said transmission blocks to a receive end; at said receive end: receiving said transmission blocks; calculating a receive end error checkword from said transmission blocks; and after receiving each of said transmission blocks, testing a subset of said receive end error checkword.
Claim 8
Dependent Claim 137 words
Method for detecting an error in a stream of data bits comprising the steps of: at a transmit end: generating from each successive data bit in said stream of data bits a transmit end error checkword, said transmit end error checkword having the property that a subset of said transmit end error checkword is a function of all previous bits in said stream of data bits; periodically forming transmission blocks each comprising a frame of data from said upstream of data bits and said subset of said transmit end error checkword; and transmitting each of said transmission blocks to a receive end; at said receive end: receiving said transmission blocks; calculating a receive end error checkword from said transmission blocks; and after receiving each of said transmission blocks, testing a subset of said receive end error checkword.
Claim 9
Dependent Claim 67 words
Method as in claim 6 in which said subset comprises a first subset, further comprising the steps of: at said transmit end: periodically inserting into said stream of bits a second subset of said transmit end error checkword, and at said receive end: at points where said second subset of said transmit end error checkword is inserted, testing said second subset of said receive end error checkword.
Claim 10
Dependent Claim 28 words
Method as in claim 7 in which said second subset is longer than said first subset of said second subset is checked less frequently than said first subset.
Claim 11
Dependent Claim 20 words
Method as in claim 8 in which said second subset is checked at the end of said stream of bits.
Claim 12
Dependent Claim 195 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a multiple bit transmit end error checkword from said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits; said transmit end error checkword being retained and updated in response to subsequent bits from said stream of bits, such that said transmit end error checkword becomes a function of said first segment of said stream of bits and a second segment of said stream of bits; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received.
Claim 13
Dependent Claim 195 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a multiple bit transmit end error checkword from said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits; said transmit end error checkword being retained and updated in response to subsequent bits from said stream of bits, such that said transmit end error checkword becomes a function of said first segment of said stream of bits and a second segment of said stream of bits; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received.
Claim 14
Dependent Claim 28 words
Structure for detecting an error as in claim 10 in which said means for generating said transmit and receive end error checkwords each comprises a CRC polynomial generator.
Claim 15
Dependent Claim 27 words
Structure for detecting an error as in claim 10 in which said means for generating said transmit and receive end error checkwords each comprises a checksum generator.
Claim 16
Dependent Claim 40 words
Structure for detecting an error as in claim 11 or 12 in which said means for generating a transmit end error checkword further comprising means for loading an initial value into said means for generating a transmit end error checkword.
Claim 17
Dependent Claim 12 words
Structure as in claim 13 in which said initial value is zero.
Claim 18
Dependent Claim 86 words
Structure for detecting an error as in claim 10 in which elements in said composite bit stream are transmitted in the following order: said first segment of said stream of bits; said subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits; said second segment of said stream of bits; and said subset of said transmit end error checkword updated in response to said first and second segments of bits from said stream of bits.
Claim 19
Dependent Claim 67 words
Structure as in claim 10 further comprising: at said receive end: a shift register; means for loading said shifting register with said composite bit stream; and means for causing said means for recognizing an expected pattern when said first segment and said subset have been received to test for said expected pattern when a selected sequence of bits appears at a particular location in said shift register.
Claim 20
Dependent Claim 293 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first amount of bits have been received; in which said composite bit stream further comprises: a second segment of said stream of bits, and a subset of said transmit end error checkword updated in response to said first and second segments of bits from said stream of bits, said subset including said at least one bit; and in which said means for recognizing further recognizes an expected pattern in a subset of said receive end error checkword when said first segment, said subset updated in response to said first segment, said second segment, and said subset updated in response to said first and second segments have been received.
Claim 21
Dependent Claim 293 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first amount of bits have been received; in which said composite bit stream further comprises: a second segment of said stream of bits, and a subset of said transmit end error checkword updated in response to said first and second segments of bits from said stream of bits, said subset including said at least one bit; and in which said means for recognizing further recognizes an expected pattern in a subset of said receive end error checkword when said first segment, said subset updated in response to said first segment, said second segment, and said subset updated in response to said first and second segments have been received.
Claim 22
Dependent Claim 68 words
Structure for detecting an error as in claim 17 in which said subset of said transmit end error checkword updated in response to said first and second segments of bits from said stream of bits is updated in response to said first segment of bits; said subset of said transmit end error checkword updated in response to said first segment of bits; and said second segment of bits.
Claim 23
Dependent Claim 40 words
Structure for detecting an error as in claim 10 or 17 or 18 in which said subset comprises a first subset, and further comprising means for recognizing an expected pattern in a second subset of said receive end error checkword.
Claim 24
Dependent Claim 20 words
Structure for detecting an error as in claim 19 in which said second subset is longer than said first subset.
Claim 25
Dependent Claim 17 words
Structure as in claim 20 in which said second subset includes all bits of said first subset.
Claim 26
Dependent Claim 20 words
Structure for detecting an error as in claim 20 in which said second subset comprises all of said error checkword.
Claim 27
Dependent Claim 251 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received; and further comprising: a counter; means for loading said counter with a count from said stream of bits; and means for causing said means for recognizing an expected pattern when said first segment and said subset have been received to test for said expected pattern when said count equals a number of bits received from said composite bit stream.
Claim 28
Dependent Claim 251 words
Structure for detecting an error in a stream of bits comprising: at a transmit end: means for generating a transmit end error checkword from said stream of bits, said transmit end error checkword being updated in response to subsequent bits from said stream of bits, at least one bit of said transmit end error checkword being a function of previous bits in said stream of bits; means for generating a composite bit stream, said composite bit stream comprising: a first segment of said stream of bits, a subset of said transmit end error checkword updated in response to said first segment of bits from said stream of bits, said subset including said at least one bit; and at a receive end: means for receiving said composite bit stream and generating a receive end error checkword in response to said composite bit stream; means for testing said composite bit stream for errors comprising: means for recognizing an expected pattern in a subset of said receive end error checkword when said first segment and said subset of said transmit end error checkword updated in response to said first segment of bits have been received; and further comprising: a counter; means for loading said counter with a count from said stream of bits; and means for causing said means for recognizing an expected pattern when said first segment and said subset have been received to test for said expected pattern when said count equals a number of bits received from said composite bit stream.

References Cited (Backward Citations)

US4208650A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-13 1997-12-13 1998-06-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-13 2001-12-13 2002-06-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-13 2005-12-13 2006-06-14 $7700.00 Window Closed / Lapsed

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