Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
128 words
An image signal processing device for processing image signals, comprising: a) a frame memory including a first-field storage area for storing a first-field image signal and a second-field storage area for storing a second-field image signal and arranged to store an image signal for one field including the first-field image signal and the second-field image signal; and b) memory control means for controlling the memory so that when the image signal for one frame is stored in said memory and then the second-field image signal for one frame stored in said frame memory is read out, the second-field image signal stored in said second-field storage area is changed with the first-field image signal stored in the second-field storage area, and then read out from said first-field storage area.
Claim 2
Dependent Claim
128 words
An image signal processing device for processing image signals, comprising: a) a frame memory including a first-field storage area for storing a first-field image signal and a second-field storage area for storing a second-field image signal and arranged to store an image signal for one field including the first-field image signal and the second-field image signal; and b) memory control means for controlling the memory so that when the image signal for one frame is stored in said memory and then the second-field image signal for one frame stored in said frame memory is read out, the second-field image signal stored in said second-field storage area is changed with the first-field image signal stored in the second-field storage area, and then read out from said first-field storage area.
Claim 3
Dependent Claim
14 words
A device according to claim 1, wherein said frame memory includes two field memories.
Claim 4
Dependent Claim
14 words
A device according to claim 2, wherein said field memories include first-in/first-out type memories.
Claim 5
Dependent Claim
56 words
A device according to claim 2, wherein said image signal is composed of a luminance signal and a color information signal, and wherein each of said field memories is arranged to individually have a luminance signal storage area for storing the luminance signal and a color information signal storage area for storing the color information signal.
Claim 6
Dependent Claim
42 words
A device according to claim 1, wherein said frame memory has said first-field storage area for storing the first-field image signal disposed at a high-order address and said second-field storage area for storing the second-field image signal disposed at a low-order address.
Claim 7
Dependent Claim
115 words
A device according to claim 2, wherein said image signal is composed of a luminance signal and a color information signal, and wherein, of said two field memories, a first field memory has a storage area for storing the luminance signal of the first-field image signal disposed at a high-order address and a storage area for storing the color information signal of the second-field image signal disposed at a low-order address, and a second field memory has a storage area for storing the color information signal of the first-field image signal disposed at a high-order address and a storage area for storing the luminance signal of the second-field image signal disposed at a low-order address.
Claim 8
Dependent Claim
253 words
An image signal processing device for processing image signals, comprising: a) a frame memory including a first-field storage area for storing a first-field image signal and a second-field storage area for storing a second-field image signal and arranged to store an image signal for one field including the first-field image signal and the second-field image signal; b) memory control means for controlling the memory so that when the image signal for one frame is stored in said frame memory and then the second-field image signal for one frame stored in said frame memory is read out, the second-field image signal stored in said second-field storage area is changed with the first-field image signal stored in said second-field storage area and then read out from said first-field storage area; and c) system clock signal generation means for generating, when an input image signal is stored in said frame memory, a system clock signal for operating said frame memory by frequency-dividing a source oscillation clock signal by using a frequency divider arranged to be reset in synchronism with a horizontal synchronizing signal included in the input image signal, and for generating, when the second-field image signal is read out from said frame memory by said memory control means and the read-out second-field image signal is again stored in the first-field storage area of said frame memory, a system clock signal for operating said frame memory by continuously frequency-dividing the source oscillation clock signal without resetting said frequency divider in synchronism with the horizontal synchronizing signal.
Claim 9
Dependent Claim
253 words
An image signal processing device for processing image signals, comprising: a) a frame memory including a first-field storage area for storing a first-field image signal and a second-field storage area for storing a second-field image signal and arranged to store an image signal for one field including the first-field image signal and the second-field image signal; b) memory control means for controlling the memory so that when the image signal for one frame is stored in said frame memory and then the second-field image signal for one frame stored in said frame memory is read out, the second-field image signal stored in said second-field storage area is changed with the first-field image signal stored in said second-field storage area and then read out from said first-field storage area; and c) system clock signal generation means for generating, when an input image signal is stored in said frame memory, a system clock signal for operating said frame memory by frequency-dividing a source oscillation clock signal by using a frequency divider arranged to be reset in synchronism with a horizontal synchronizing signal included in the input image signal, and for generating, when the second-field image signal is read out from said frame memory by said memory control means and the read-out second-field image signal is again stored in the first-field storage area of said frame memory, a system clock signal for operating said frame memory by continuously frequency-dividing the source oscillation clock signal without resetting said frequency divider in synchronism with the horizontal synchronizing signal.
Claim 10
Dependent Claim
14 words
A device according to claim 7, wherein said frame memory includes two field memories.
Claim 11
Dependent Claim
14 words
A device according to claim 8, wherein said field memories include first-in/first-out type memories.
Claim 12
Dependent Claim
56 words
A device according to claim 8, wherein said image signal is composed of a luminance signal and a color information signal, and wherein each of said field memories is arranged to individually have a luminance signal storage area for storing the luminance signal and a color information signal storage area for storing the color information signal.
Claim 13
Dependent Claim
42 words
A device according to claim 7, wherein said frame memory has said first-field storage area for storing the first-field image signal disposed at a high-order address and said second-field storage area for storing the second-field image signal disposed at a low-order address.
Claim 14
Dependent Claim
115 words
A device according to claim 8, wherein said image signal is composed of a luminance signal and a color information signal, and wherein, of said two field memories, a first field memory has a storage area for storing the luminance signal of the first-field image signal disposed at a high-order address and a storage area for storing the color information signal of the second-field image signal disposed at a low-order address, and a second field memory has a storage area for storing the color information signal of the first-field image signal disposed at a high-order address and a storage area for storing the luminance signal of the second-field image signal disposed at a low-order address.
Claim 15
Dependent Claim
155 words
An image signal processing device for processing an image signal composed of a luminance signal and a color information signal, comprising: a) a frame memory capable of storing an image signal for one frame, including first and second field memories each of which has a storage area for storing an image signal for one field; and b) memory control means arranged to have a first-field image signal and a second-field image signal serially inputted thereto, to store the luminance signal of the first-field image signal in a high order address of the first field memory, to store the color information signal of the first-field image signal in a high-order address of the second field memory, to store the color information signal of the second-field image signal in a low-order address of the first field memory and to store the luminance signal of the second-field image signal in a low-order address of the second field memory.
Claim 16
Dependent Claim
155 words
An image signal processing device for processing an image signal composed of a luminance signal and a color information signal, comprising: a) a frame memory capable of storing an image signal for one frame, including first and second field memories each of which has a storage area for storing an image signal for one field; and b) memory control means arranged to have a first-field image signal and a second-field image signal serially inputted thereto, to store the luminance signal of the first-field image signal in a high order address of the first field memory, to store the color information signal of the first-field image signal in a high-order address of the second field memory, to store the color information signal of the second-field image signal in a low-order address of the first field memory and to store the luminance signal of the second-field image signal in a low-order address of the second field memory.
Claim 17
Dependent Claim
24 words
A device according to claim 13, wherein an amount of information of the color information signal is smaller than that of the luminance signal.
Claim 18
Dependent Claim
14 words
A device according to claim 13, wherein said field memories include first-in/first-out type memories.