Video signal storage apparatus for NTSC system

Claim 2

A video signal storage apparatus for storing a video signal having a subcarrier frequency, comprising: digitizing means for delivering a first digital signal in response to such video signal by digitizing such video signal at a sampling frequency 2n-times (n: integer) the subcarrier frequency, said first digital signal containing 2n data for each cycle period of the subcarrier frequency; first polarity inverting means for receiving said first digital signal and delivering a modified digital signal wherein the polarity of n consecutive data of said 2n data of said first digital signal are inverted such that all of said 2n data of said modified digital signal have the same polarity; memory means coupled to said first polarity inverting means for receiving, storing and reading out said modified digital signal; and second polarity inverting means coupled to said memory means for receiving said modified digital signal and inverting the polarity of n consecutive data of said 2n data of said modified digital signal read out from said memory means to deliver a second digital signal which is substantially the same as said first digital signal.

Claim 3

An apparatus as in claim 1, wherein said digitizing means comprises a Y/C separator for delivering a digital luminance signal, and said first digital signal being a digital chrominance signal delivered by said Y/C separator.

Claim 4

An apparatus as in claim 2, further comprising second memory means for receiving, storing, and reading out said digital luminance signal.

Claim 5

An apparatus as in claim 3, further comprising addressing means for commonly addressing both said first-mentioned memory means and said second memory means for writing data therein.

Claim 6

An apparatus as in claim 4, further comprising second addressing means for commonly addressing both said memory means for reading out data therefrom.

Claim 7

An apparatus as in claim 2, said digital chrominance signal comprising I and Q components being commonly received by said first polarity inverting means for being converted into said modified digital signal and stored in said memory means.

Claim 8

An apparatus as in claim 6, wherein said I and Q components each include a first polarity portion and an opposite polarity portion, and said n consecutive data inverted by said first polarity inverting means correspond to said opposite polarity portion.

Claim 9

An apparatus as in claim 7, said first and opposite polarity portions each corresponding to a respective half-cycle of said subcarrier frequency, and further comprising timing means for timing said first polarity inverting means to invert only said n data of said first digital signal during the half-cycle corresponding to said opposite polarity portion.

Claim 10

An apparatus as in claim 8, further comprising second timing means for timing said second polarity inverting means such that said second digital signal is different in phase from said first digital signal.

Claim 11

A storage apparatus for storing a digitized chrominance signal of the NTSC system, said digitized chrominance signal having a subcarrier frequency and being expressed by a train of data, said storage apparatus comprising: first inverting means for inverting the polarity of data of said digitized chrominance signal during a half cycle of the subcarrier frequency to deliver a modified digitized chrominance signal; memory means coupled to said first inverting means for storing said modified digitized chrominance signal; and second inverting means coupled to said memory means for inverting the polarity of data of said modified digitized chrominance signal read out from said memory means during a half cycle of the subcarrier frequency.

Claim 12

A storage apparatus for storing a digitized chrominance signal of the NTSC system, said digitized chrominance signal having a subcarrier frequency and being expressed by a train of data, said storage apparatus comprising: first inverting means for inverting the polarity of data of said digitized chrominance signal during a half cycle of the subcarrier frequency to deliver a modified digitized chrominance signal; memory means coupled to said first inverting means for storing said modified digitized chrominance signal; and second inverting means coupled to said memory means for inverting the polarity of data of said modified digitized chrominance signal read out from said memory means during a half cycle of the subcarrier frequency.

Claim 13

A storage apparatus as claimed in claim 10, further comprising control means for producing a polarity control signal for determining the respective half cycle of said subcarrier during which said first and second inverting means invert said respective signals.

Claim 14

An apparatus as in claim 11, wherein said control means further produces a second polarity control signal, said first-mentioned and second polarity control signals being for controlling said first and second polarity inverting means and having the same frequency but different phase.

Claim 15

An apparatus as in claim 12, wherein said second polarity control signal is a delayed signal in synchronism with said first-mentioned polarity control signal.

Claim 16

A storage apparatus for storing a digitized chrominance signal of the NTSC system, said digitized chrominance signal being expressed by a train of data and having a subcarrier frequency, said data being sampled by a sampling frequency 2n-times (n: integer) as great as said subcarrier frequency, said storage apparatus comprising: writing address generating means synchronized with said digitized chrominance signal for generating a writing address in synchronism with said sampling frequency; first control signal generating means for generating a first control signal indicating a period of a half cycle of the subcarrier frequency in synchronism with said digitized chrominance signal; first inverting means for inverting the polarity of n data of said digitized chrominance signal in response to said first control signal to deliver a modified digitized chrominance signal; memory means for storing said modified digitized chrominance signal in response to said writing address; reading address generating means receiving a reference signal for generating a reading address in synchronism with said reference signal, said modified digital chrominance signal being read out from said memory means in response to said reading address; second control signal generating means for generating a second control signal indicating a period of a half cycle of the subcarrier in synchronism with said reference signal; and second inverting means coupled to said memory means for inverting the polarity of n data of said modified digitized chrominance signal read out from said memory means in response to said second control signal.

Claim 17

A storage apparatus for storing a digitized chrominance signal of the NTSC system, said digitized chrominance signal being expressed by a train of data and having a subcarrier frequency, said data being sampled by a sampling frequency 2n-times (n: integer) as great as said subcarrier frequency, said storage apparatus comprising: writing address generating means synchronized with said digitized chrominance signal for generating a writing address in synchronism with said sampling frequency; first control signal generating means for generating a first control signal indicating a period of a half cycle of the subcarrier frequency in synchronism with said digitized chrominance signal; first inverting means for inverting the polarity of n data of said digitized chrominance signal in response to said first control signal to deliver a modified digitized chrominance signal; memory means for storing said modified digitized chrominance signal in response to said writing address; reading address generating means receiving a reference signal for generating a reading address in synchronism with said reference signal, said modified digital chrominance signal being read out from said memory means in response to said reading address; second control signal generating means for generating a second control signal indicating a period of a half cycle of the subcarrier in synchronism with said reference signal; and second inverting means coupled to said memory means for inverting the polarity of n data of said modified digitized chrominance signal read out from said memory means in response to said second control signal.

Claim 18

An apparatus as in claim 14, wherein said digitized chrominance signal and modified digitized chrominance signal each have a first polarity portion and an opposite polarity portion, each of said portions corresponding to a respective half-cycle of the subcarrier frequency, said first and second control signals controlling said first and second inverting means to invert only data corresponding to said opposite polarity portions.