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US5317472A
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Apparatus for insuring the security of output signals from protective relays used in electric power systems
Assignee: Schweitzer Engineering Laboratories Inc
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Filing: 1992-03-17
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Granted: 1994-05-31
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Expires: 2012-03-17
Abstract
Abstract In a protective relay (10), which contains a microprocessor (30), for monitoring a power transmission line, an output enable decoder (72) and a one-shot timer (74) produce a very short (5 microsecond) signal in response to an address signal from the microprocessor. The output from the timer is applied as one input to AND gate (70). A conventional address decoder, responsive to an address signal identifying a particular output port from the microprocessor, provides another output to AND gate (70). AND gate (70) produces a latch control signal when the two signals are coincident in time. The latch control signal enables the particular output port to receive instructions from a data bus (60).
Inventors
- 👤 Edmund O. Schweitzer, III
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 17:28
CPC Classifications
H; H02; H02H; H02H3/00; H02H3/02; H02H3/05
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
138 words
An apparatus for insuring the correct assertion of output signals by a protective relay used in a power transmission system, comprising: output port decoder means in a protective relay which includes a microprocessor and which is used in a power transmission system, said output port decoder means, in response to address information from the microprocessor, producing an address signal identifying a particular output port of the relay; an enable decoder assembly in the protective relay responsive to an address enable signal from the microprocessor to produce an output enable signal for a selected period of time; and means responsive to the coincidence in time of the output enable signal an the address signal to produce a control signal which is applied to said particular output port to enable said particular output port to receive instructions from the microprocessor.
Claim 2
Independent Claim
138 words
An apparatus for insuring the correct assertion of output signals by a protective relay used in a power transmission system, comprising: output port decoder means in a protective relay which includes a microprocessor and which is used in a power transmission system, said output port decoder means, in response to address information from the microprocessor, producing an address signal identifying a particular output port of the relay; an enable decoder assembly in the protective relay responsive to an address enable signal from the microprocessor to produce an output enable signal for a selected period of time; and means responsive to the coincidence in time of the output enable signal an the address signal to produce a control signal which is applied to said particular output port to enable said particular output port to receive instructions from the microprocessor.
Claim 3
Dependent Claim
18 words
An apparatus of claim 1, wherein the output enable signal occurs for only a short period of time.
Claim 4
Dependent Claim
15 words
An apparatus of claim 2, wherein the short period of time is approximately 5 microseconds.
Claim 5
Dependent Claim
19 words
An apparatus of claim 1, wherein the particular output port controls a circuit breaker on the power transmission system.
Claim 6
Dependent Claim
48 words
An apparatus of claim 1, wherein the enable decoder assembly includes (a) a decoder which produces a decoder signal in response to receiving an address enable signal containing its own unique address and (b) a timer element responsive to the decoder signal to produce said output enable signal.
Claim 7
Dependent Claim
24 words
An apparatus of claim 1, wherein the particular output port appears to the microprocessor as a location in the memory map of the microprocessor.
Claim 8
Dependent Claim
22 words
An apparatus of claim 1, wherein the particular output port is associated with a selected location in the memory of the microprocessor.
Claim 9
Dependent Claim
15 words
An apparatus of claim 1, wherein said output port decoder is external to the microprocessor.
Claim 10
Dependent Claim
15 words
An apparatus of claim 1, wherein said output port decoder is internal to the microprocessor.
Claim 11
Dependent Claim
24 words
An apparatus of claim 1, wherein the output from the enable decoder assembly is usable in association with a plurality of different output ports.
References Cited (Backward Citations)
US4314301A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-30 | 1997-11-29 | 1998-05-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-30 | 2001-11-29 | 2002-05-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-30 | 2005-11-29 | 2006-05-31 | $7700.00 | Window Closed / Lapsed |