Current sense circuit with fast response

Claim 2

A current sense amplifier comprising: An impedance transfer circuit including an input terminal, a first transistor, a first amplifier, a second transistor and a second amplifier, wherein a source of said first transistor, an input of said first amplifier, a source of said second transistor and an input of said second amplifier are connected to said input terminal respectively, an output of said first amplifier is connected to a gate of said first transistor, an output of said second amplifier is connected to a gate of said second transistor and a drain of said second transistor is connected to a positive supply terminal; said first and second amplifiers respectively receiving a first and second reference voltage with the first reference voltage of said first amplifiers being larger than the second reference voltage of said second amplifier; and a current comparator circuit, comprising a load which is connected to a drain of said first transistor and a comparator providing an output logic level of said current comparator circuit, according to a current passing through said first transistor.

Claim 3

A current sense circuit comprising: (a) an impedance transfer circuit comprising a first and a second amplifying means and a first and a second transistors having a gate, a drain and a source, respectively; wherein said first and second amplifying means have a respective input terminal connected with a current source and receives first and second reference voltages, respectively for being compared with a voltage provided from said current source; the outputs of said first and second amplifying means are coupled respectively to the gates of said first and second transistor; the sources of said first and second transistor both connected with said current source and the drain of said second transistor is connected directly with a positive power supply terminal, which the drain of said first transistor is connected with said positive power supply terminal via a load; and said first transistor is smaller in size than said second transistor and said first reference voltage is slightly larger than said second reference voltage; and (b) a current comparator means for comparing a current passing through said first transistor with a third reference voltage.

Claim 4

A current sense circuit comprising: (a) an impedance transfer circuit comprising a first and a second amplifying means and a first and a second transistors having a gate, a drain and a source, respectively; wherein said first and second amplifying means have a respective input terminal connected with a current source and receives first and second reference voltages, respectively for being compared with a voltage provided from said current source; the outputs of said first and second amplifying means are coupled respectively to the gates of said first and second transistor; the sources of said first and second transistor both connected with said current source and the drain of said second transistor is connected directly with a positive power supply terminal, which the drain of said first transistor is connected with said positive power supply terminal via a load; and said first transistor is smaller in size than said second transistor and said first reference voltage is slightly larger than said second reference voltage; and (b) a current comparator means for comparing a current passing through said first transistor with a third reference voltage.

Claim 5

A current sense circuit comprising: a current input; a circuit output; a first transistor having a first end connected to said current input and a second end connected to said circuit output; an impedance load connected between a first reference voltage and said circuit output; a second transistor having a first end connected to said current input and a second end connected to said first reference voltage; a first amplifier having an output connected to a gate of said first transistor, a first amplifier input connected to said current input and a second amplifier input connected to a second reference voltage; and a second amplifier having an output connected to a gate of said second transistor, a first amplifier input connected to said current input and a second amplifier input connected to a third reference voltage less than said second reference voltage, wherein measurement of a voltage drop at the circuit output is indicative of a current flow through said current input.

Claim 6

A current sense circuit comprising: a current input; a circuit output; a first transistor having a first end connected to said current input and a second end connected to said circuit output; an impedance load connected between a first reference voltage and said circuit output; a second transistor having a first end connected to said current input and a second end connected to said first reference voltage; a first amplifier having an output connected to a gate of said first transistor, a first amplifier input connected to said current input and a second amplifier input connected to a second reference voltage; and a second amplifier having an output connected to a gate of said second transistor, a first amplifier input connected to said current input and a second amplifier input connected to a third reference voltage less than said second reference voltage, wherein measurement of a voltage drop at the circuit output is indicative of a current flow through said current input.

Claim 7

The current sense circuit of claim 3 further comprising a comparator having one input connected to said circuit output and a second input connected to a fourth reference voltage, wherein an output of the comparator provides a logic output for the current sense circuit that is one of a logic high and a logic low signal.

Claim 8

A current sensing circuit, comprising: a circuit input; a circuit output; a first transistor having one end connected to said circuit input and one end connected to said circuit output; an impedance load connected between a first reference voltage and said circuit output; a first CMOS pair serially connected between said first reference voltage and a ground reference voltage, with both gates of said CMOS pair connected to said circuit input and with a serial interconnection between elements of said first CMOS pair connected to a gate of said first transistor; a second transistor having one end connected to said first reference voltage and a second end connected to said circuit input; and a second CMOS pair serially connected between said first reference voltage and said ground reference voltage with both gates of said second CMOS pair connected to said circuit input and with a serial interconnection between elements of said second CMOS pair connected to a gate of said of second transistor, wherein a voltage drop across said impedance load is indicative of a current flow through said circuit input.

Claim 9

A current sensing circuit, comprising: a circuit input; a circuit output; a first transistor having one end connected to said circuit input and one end connected to said circuit output; an impedance load connected between a first reference voltage and said circuit output; a first CMOS pair serially connected between said first reference voltage and a ground reference voltage, with both gates of said CMOS pair connected to said circuit input and with a serial interconnection between elements of said first CMOS pair connected to a gate of said first transistor; a second transistor having one end connected to said first reference voltage and a second end connected to said circuit input; and a second CMOS pair serially connected between said first reference voltage and said ground reference voltage with both gates of said second CMOS pair connected to said circuit input and with a serial interconnection between elements of said second CMOS pair connected to a gate of said of second transistor, wherein a voltage drop across said impedance load is indicative of a current flow through said circuit input.

Claim 10

The current sensing circuit of claim 5 wherein length to width ratios of said first and second CMOS pairs differ by an amount that causes said second transistor to be turned off by said second CMOS pair at a first voltage of said circuit input that is less than a second voltage of said circuit input at which said first transistor is turned off by said first CMOS pair.

Claim 11

The current sensing circuit of claim 5 wherein said impedance load is a first FET connected between said first reference voltage and said circuit output, with a gate connected to said ground reference voltage.

Claim 12

The current sensing circuit of claim 7 further comprising second and third FET's serially connected between said first reference voltage and said circuit output, with said second FET having its gate connected to a serial interconnection between said second and third FET's and with said third FET having its gate connected to said circuit output.

Claim 13

The current sensing circuit of claim 5 further comprising an invertor connected to said circuit output.