Fault detection circuit for use in determining the existence of a fault in any one of a plurality of DC loads

Claim 2

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a center-tapped reference load having two equal resistances connected to a floating reference centerpoint, each resistance being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltage of said reference centerpoint.

Claim 3

The circuit of claim 1, wherein said comparing means operates in a manner that a fault output signal is produced when any of said monitored voltages is substantially unequal to the voltage of said reference centerpoint.

Claim 4

The circuit of claim 1, wherein said monitoring means comprises two sets of diodes each having a number of diodes which equals the number of loads to be monitored, the first set of diodes having all their cathodes connected together and the second set of diodes having all their anodes connected together, and each diode in each set having an electrode which is connected to a corresponding one of the centerpoints of a center-tapped load to be monitored.

Claim 5

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a center-tapped reference load having two equal resistances connected to a floating reference centerpoint, each resistance being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored, said means comprising a) a first set of n diodes, n being an integer equal to the number of loads of be monitored, all diodes in the first set having their cathodes connected together and each diode in the first set having its anode connected to the centerpoint of a corresponding single one of the loads to be monitored, b) a second set of n diodes, all diodes in the second set having their anodes connected together and each diode in the second set having its cathode connected to the centerpoint of a corresponding single one of the loads to be monitored; and means for comparing said monitored voltages with the voltage of said reference centerpoint.

Claim 6

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a center-tapped reference load having two equal resistances connected to a floating reference centerpoint, each resistance being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored, said means comprising a) a first set of n diodes, n being an integer equal to the number of loads of be monitored, all diodes in the first set having their cathodes connected together and each diode in the first set having its anode connected to the centerpoint of a corresponding single one of the loads to be monitored, b) a second set of n diodes, all diodes in the second set having their anodes connected together and each diode in the second set having its cathode connected to the centerpoint of a corresponding single one of the loads to be monitored; and means for comparing said monitored voltages with the voltage of said reference centerpoint.

Claim 7

The circuit of claim 4, wherein said comparing means comprises first and second operational amplifiers, the inverting input of the first operational amplifier and the non-inverting input of the second operational amplifier being both connected to said reference centerpoint, the cathodes of the first set of diodes being connected to the non-inverting input of the first operational amplifier, and the anodes of the second set of diodes being connected to the inverting input of the second operational amplifier.

Claim 8

The circuit of claim 5, wherein the outputs of the first and second operational amplifiers are connected together.

Claim 9

The circuit of claim 4, wherein said comparing means comprises first and second comparators each having first and second inputs, the first input of the first comparator and the second input of the second comparator being both connected to said reference centerpoint, the cathodes of the first set of diodes being connected to the second input of the first comparator, and the anodes of the second set of diodes being connected to the first input of the second comparator.

Claim 10

The circuit of claim 7, wherein the outputs of the first and second comparators are connected together.

Claim 11

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of the two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored, said means comprising a) a first set of n diodes, n being an integer equal to the number of loads of be monitored, all diodes in the first set having their cathodes connected together and each diode in the first set having its anode connected to the centerpoint of a corresponding single one of the loads to be monitored, b) a second set of n diodes, all diodes in the second set having their anodes connected together and each diode in the second set having its cathode connected to the centerpoint of a corresponding single one of the loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of the small bias resistor.

Claim 12

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of the two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored, said means comprising a) a first set of n diodes, n being an integer equal to the number of loads of be monitored, all diodes in the first set having their cathodes connected together and each diode in the first set having its anode connected to the centerpoint of a corresponding single one of the loads to be monitored, b) a second set of n diodes, all diodes in the second set having their anodes connected together and each diode in the second set having its cathode connected to the centerpoint of a corresponding single one of the loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of the small bias resistor.

Claim 13

The circuit of claim 9, wherein said comparing means comprises first and second operational amplifiers, the inverting input of the first operational amplifier and the non-inverting input of the second operational amplifier being each connected to a corresponding end of the small bias resistor, the cathodes of the first set of diodes being connected to the non-inverting input of the first operational amplifier, and the anodes of the second set of diodes being connected to the inverting input of the second operational amplifier.

Claim 14

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of said two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of said small bias resistor.

Claim 15

A fault detection circuit for determining the existence of a fault in any one of a plurality of center-tapped loads which are supplied by a DC source, comprising: a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of said two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of said small bias resistor.

Claim 16

A fault detection system for use with a DC source, comprising: a plurality of center-tapped loads; a center-tapped reference load having two equal resistances connected to a floating reference centerpoint, each resistance being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltage of said reference centerpoint.

Claim 17

A fault detection system for use with a DC source, comprising: a plurality of center-tapped loads; a center-tapped reference load having two equal resistances connected to a floating reference centerpoint, each resistance being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltage of said reference centerpoint.

Claim 18

A fault detection system for use with a DC source, comprising: a plurality of center-tapped loads; a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of said two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of the small bias resistor.

Claim 19

A fault detection system for use with a DC source, comprising: a plurality of center-tapped loads; a reference load network having two equal resistances connected in series with each other through a small bias resistor, each of said two equal resistances being connected to a corresponding side of the source; means for monitoring the voltages at the centerpoints of all the center-tapped loads to be monitored; and means for comparing said monitored voltages with the voltages at the ends of the small bias resistor.