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US5311480A
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Method and apparatus for EEPROM negative voltage wordline decoding
Assignee: Texas Instruments Inc
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Filing: 1992-12-16
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Granted: 1994-05-10
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Expires: 2012-12-16
Abstract
Abstract A method and apparatus for negative wordline decoding in a flash EEPROM (10) is provided. In particular, a predecoder (26) generates a predecoding signal based on address and invert inputs. The predecoding signal is used to select wordlines in both positive and negative voltage decoding modes. Each wordline has associated with it a driver (28). The driver (28) receives the predecoding signal and is operable to drive the associated wordline high in response to the appropriate predecoding signal. Wordlines also have associated with them negative charge pumps (32). Each charge pump (32) is operable to drive the associated wordline negative when the driver (28) is not driving the wordline positive.
Inventors
- 👤 John F. Schreck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:41
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/08; G11C16/10; G11C16/14
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
107 words
A method of decoding wordlines in a flash electrically erasable, programmable read only memory having a plurality of memory cells, comprising the steps of: generating negative voltages in a plurality of negative charge pumps, each of the negative charge pumps coupled to a different wordline; generating a predecoding signal in a predecoder; generating non-negative voltages in a plurality of driver circuits in response to the predecoding signal, each of the driver circuits coupled to a different wordline; and coupling to each wordline either the negative voltage from the respective negative charge pump or the non-negative voltage from the respective driver circuit, in response to the predecoding signal.
Claim 2
Independent Claim
107 words
A method of decoding wordlines in a flash electrically erasable, programmable read only memory having a plurality of memory cells, comprising the steps of: generating negative voltages in a plurality of negative charge pumps, each of the negative charge pumps coupled to a different wordline; generating a predecoding signal in a predecoder; generating non-negative voltages in a plurality of driver circuits in response to the predecoding signal, each of the driver circuits coupled to a different wordline; and coupling to each wordline either the negative voltage from the respective negative charge pump or the non-negative voltage from the respective driver circuit, in response to the predecoding signal.
Claim 3
Independent Claim
118 words
A method of decoding wordlines in a flash electrically erasable, programmable read only memory having a plurality of memory cells, comprising the steps of: generating negative voltages in a plurality of negative charge pumps, each of the negative charge pumps coupled to a different group of wordlines; generating predecoding signals in a predecoder; generating non-negative voltages in a plurality of driver circuits in response to the predecoding signals, each of the driver circuits coupled to a different wordline; coupling to each group of wordlines the negative voltage from the respective negative charge pump in response to the predecoding signals; and coupling to each wordline the non-negative voltages from the respective driver circuit in response to the predecoding signals.
Claim 4
Independent Claim
118 words
A method of decoding wordlines in a flash electrically erasable, programmable read only memory having a plurality of memory cells, comprising the steps of: generating negative voltages in a plurality of negative charge pumps, each of the negative charge pumps coupled to a different group of wordlines; generating predecoding signals in a predecoder; generating non-negative voltages in a plurality of driver circuits in response to the predecoding signals, each of the driver circuits coupled to a different wordline; coupling to each group of wordlines the negative voltage from the respective negative charge pump in response to the predecoding signals; and coupling to each wordline the non-negative voltages from the respective driver circuit in response to the predecoding signals.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-09 | 1997-11-08 | 1998-05-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-09 | 2001-11-08 | 2002-05-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-09 | 2005-11-08 | 2006-05-10 | $7700.00 | Window Closed / Lapsed |