US5311176A
Expired / Lapsed
US
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Method and apparatus for generating Walsh codes
Assignee: Motorola Solutions Inc
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Filing: 1992-03-31
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Granted: 1994-05-10
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Expires: 2012-03-31
Abstract
Abstract A method and apparatus is provided for generating Walsh codes. A first group of address signals is generated. Subsequently, inversion control signals are generated by logically gating the first group of address signals with a second group of address signals. Finally, a Walsh code is produced by inverting elements of a predetermined vector in accordance with the generated inversion control signals.
Inventors
- 👤 David P. Gurney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 10:23
CPC Classifications
H; H04; H04J; H04J13/00; H04J13/0007; H04J13/004; H04J13/0048; G; G06; G06F; G06F1/00; G06F1/02; G06F1/025; G06F1/0255; H04J13/10; H04J13/12
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
81 words
A Walsh code generator, comprising: (a) counter means for generating a first group of address signals; (b) address means, operatively coupled to the counter means, for generating inversion control signals by logically gating the first group of address signals with a second group of address signals; and (c) code inversion means, operatively coupled to the address means, for producing a Walsh code by inverting elements of a predetermined non-null vector through an Exclusive-OR logical gating with the generated inversion control signals.
Claim 2
Dependent Claim
81 words
A Walsh code generator, comprising: (a) counter means for generating a first group of address signals; (b) address means, operatively coupled to the counter means, for generating inversion control signals by logically gating the first group of address signals with a second group of address signals; and (c) code inversion means, operatively coupled to the address means, for producing a Walsh code by inverting elements of a predetermined non-null vector through an Exclusive-OR logical gating with the generated inversion control signals.
Claim 3
Dependent Claim
29 words
The Walsh code generator of claim 1 wherein the counter means comprises a state machine selected from a group consisting essentially of a synchronous counter and an asynchronous counter.
Claim 4
Dependent Claim
18 words
The Walsh code generator of claim 1 wherein the counter means comprises a six bit length binary counter.
Claim 5
Dependent Claim
28 words
The Walsh code generator of claim 1 wherein the counter means comprises a clocking means for controlling a rate at which the Walsh codes are to be generated.
Claim 6
Dependent Claim
25 words
The Walsh code generator of claim 1 wherein the first group of address signals determines which elements of the Walsh code are to be generated.
Claim 7
Dependent Claim
22 words
The Walsh code generator of claim 1 wherein the second group of address signals determines which Walsh code is to be generated.
Claim 8
Dependent Claim
45 words
The Walsh code generator of claim 1 wherein the address means generates one of the inversion control signals by performing a logical AND of an address signal from the first group of address signals and an address signal from the second group of address signals.
Claim 9
Dependent Claim
51 words
The Walsh code generator of claim 1 wherein the code inversion means comprises a parity checker having a group of inputs and at least one output, each input receiving one of the inversion control signals from the address means, the output providing a sequence of bits representing the produced Walsh code.
Claim 10
Independent Claim
61 words
A method of generating Walsh codes, comprising: (a) generating a first group of address signals; (b) generating inversion control signals by logically gating the first group of address signals with a second group of address signals; and (c) producing a Walsh code by inverting elements of a predetermined non-null vector through an Exclusive-OR logical gating with the generated inversion control signals.
Claim 11
Independent Claim
61 words
A method of generating Walsh codes, comprising: (a) generating a first group of address signals; (b) generating inversion control signals by logically gating the first group of address signals with a second group of address signals; and (c) producing a Walsh code by inverting elements of a predetermined non-null vector through an Exclusive-OR logical gating with the generated inversion control signals.
Claim 12
Dependent Claim
35 words
The method of claim 9 wherein the step of generating a first group of address signals comprises utilizing a state machine selected from a group consisting essentially of a synchronous counter and an asynchronous counter.
Claim 13
Dependent Claim
24 words
The method of claim 9 wherein the step of generating a first group of address signals comprises utilizing a six bit length binary counter.
Claim 14
Dependent Claim
34 words
The method of claim 9 wherein the step of generating a first group of address signals comprises utilizing a clocking means for controlling a rate at which the Walsh codes are to be generated.
Claim 15
Dependent Claim
23 words
The method of claim 11 wherein the first group of address signals determines which elements of the Walsh code are to be generated.
Claim 16
Dependent Claim
20 words
The method of claim 11 wherein the second group of address signals determines which Walsh code is to be generated.
Claim 17
Dependent Claim
39 words
The method of claim 11 wherein the step of generating inversion control signals comprises performing a logical AND of an address signal from the first group address signals and an address signal from the second group of address signals.
Claim 18
Dependent Claim
49 words
The method of claim 9 wherein the step of producing a Walsh code comprises utilizing a parity checker having a group of inputs and at least one output, each input receiving one of the inversion control signals, the output providing a sequence of bits representing the produced Walsh code.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-09 | 1997-11-08 | 1998-05-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-09 | 2001-11-08 | 2002-05-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-09 | 2005-11-08 | 2006-05-10 | $7700.00 | Window Closed / Lapsed |