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US5301338A Expired / Lapsed US ⏱️ 0.0 years remaining

System including central processing unit

Assignee: Ricoh Co Ltd
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Filing: 1990-08-17
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Granted: 1994-04-05
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Expires: 2010-08-17
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Abstract

Abstract A central processing unit includes a programmable logic array, a timing control unit, a predecoder, a data input/output part, and a processing part. The processing part carries out a predetermined operation on m-bit low-order data from among data which is composed of n bits and which is read out from a memory and m-bit high-order data from among the data composed of n bits, and outputs a carry signal when the predetermined operation on the m-bit low-order data results in a carry. When the operation code is a read modify write instruction and when the processing part outputs the carry signal, the programmable logic array controls the input/output part so that only the result of the predetermined operation on the m-bit low-order data is written into the memory.

Inventors

  • 👤 Shinichi Yamaura
  • 👤 Takashi Yasui
  • 👤 Keiichi Yoshioka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 04:23
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/3001; G06F9/30014; G06F9/30018

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 312 words
A system comprising: a central processing unit having data processing means for processing data having a first data length, said data being composed of low-order data and high-order data and for processing said low-order data during a first machine cycle and said high-order data during a second machine cycle subsequent to said first machine cycle; a memory storing data; a data bus coupled to said central processing unit and said memory, said data bus having a second data length which is less than said first data length; and an address bus coupled to said central processing unit and said memory; said central processing unit comprising: read/write means for writing data into said memory via said data bus in accordance with an address and for reading out data from said memory via said data bus in accordance with another address; determining means for determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and control means for making said data processing means immediately process the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered into the memory when said determining means determines that it is unnecessary to process the high-order data of said data being considered; wherein said determining means comprises means for determining whether or not said result obtained by processing the low-order data of said data being considered has a carry, wherein said control means causes said data processing means to immediately process the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when said determining means determines that said result has the carry.
Claim 2
Independent Claim 312 words
A system comprising: a central processing unit having data processing means for processing data having a first data length, said data being composed of low-order data and high-order data and for processing said low-order data during a first machine cycle and said high-order data during a second machine cycle subsequent to said first machine cycle; a memory storing data; a data bus coupled to said central processing unit and said memory, said data bus having a second data length which is less than said first data length; and an address bus coupled to said central processing unit and said memory; said central processing unit comprising: read/write means for writing data into said memory via said data bus in accordance with an address and for reading out data from said memory via said data bus in accordance with another address; determining means for determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and control means for making said data processing means immediately process the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered into the memory when said determining means determines that it is unnecessary to process the high-order data of said data being considered; wherein said determining means comprises means for determining whether or not said result obtained by processing the low-order data of said data being considered has a carry, wherein said control means causes said data processing means to immediately process the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when said determining means determines that said result has the carry.
Claim 3
Independent Claim 310 words
A system comprising: a central processing unit having data processing means for processing data having a first data length, said data being composed of low-order data and high-order data and for processing said low-order data during a first machine cycle and said high-order data during a second machine cycle subsequent to said first machine cycle; a memory storing data; a data bus coupled to said central processing unit and said memory, said data bus having a second data length which is less than said first data length; and an address bus coupled to said central processing unit and said memory; said central processing unit comprising: read/write means for writing data into said memory via said data bus in accordance with an address and for reading out data from said memory via said data bus in accordance with another address; determining means for determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and control means for making said data processing means immediately process the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered into the memory when said determining means determines that it is unnecessary to process the high-order data of said data being considered; wherein said determining means comprises means for determining whether or not said result obtained by processing the low-order data of said data being considered has a borrow, wherein said control means makes said data processing means immediately process the low-order data of data subsequent to said data being considered without processing the high-order of said data being considered when said determining means determines that said result has the borrow.
Claim 4
Independent Claim 310 words
A system comprising: a central processing unit having data processing means for processing data having a first data length, said data being composed of low-order data and high-order data and for processing said low-order data during a first machine cycle and said high-order data during a second machine cycle subsequent to said first machine cycle; a memory storing data; a data bus coupled to said central processing unit and said memory, said data bus having a second data length which is less than said first data length; and an address bus coupled to said central processing unit and said memory; said central processing unit comprising: read/write means for writing data into said memory via said data bus in accordance with an address and for reading out data from said memory via said data bus in accordance with another address; determining means for determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and control means for making said data processing means immediately process the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered into the memory when said determining means determines that it is unnecessary to process the high-order data of said data being considered; wherein said determining means comprises means for determining whether or not said result obtained by processing the low-order data of said data being considered has a borrow, wherein said control means makes said data processing means immediately process the low-order data of data subsequent to said data being considered without processing the high-order of said data being considered when said determining means determines that said result has the borrow.
Claim 5
Dependent Claim 235 words
A data processing method comprising the steps of: (a) reading data from a memory via a data bus, said data having a first data length, said data being composed of low-order data and high-order data, and said data bus having a second data length less than said first data length; (b) processing said low-order data of data being considered during a first machine cycle; (c) processing said high-order data of said data being considered during a second machine cycle; (d) determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and (e) immediately processing the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered when said step (d) determines that it is unnecessary to process the high-order data of said data being considered; wherein said step (d) further comprises the step of determining whether or not said result obtained by processing the low-order data of said data being considered has a carry, wherein said step (e) immediately processes the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when it is determined that said result has the carry.
Claim 6
Dependent Claim 235 words
A data processing method comprising the steps of: (a) reading data from a memory via a data bus, said data having a first data length, said data being composed of low-order data and high-order data, and said data bus having a second data length less than said first data length; (b) processing said low-order data of data being considered during a first machine cycle; (c) processing said high-order data of said data being considered during a second machine cycle; (d) determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and (e) immediately processing the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered when said step (d) determines that it is unnecessary to process the high-order data of said data being considered; wherein said step (d) further comprises the step of determining whether or not said result obtained by processing the low-order data of said data being considered has a carry, wherein said step (e) immediately processes the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when it is determined that said result has the carry.
Claim 7
Dependent Claim 235 words
A data processing method comprising the steps of: (a) reading data from a memory via a data bus, said data having a first data length, said data being composed of low-order data and high-order data, and said data bus having a second data length less than said first data length; (b) processing said low-order data of data being considered during a first machine cycle; (c) processing said high-order data of said data being considered during a second machine cycle; (d) determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and (e) immediately processing the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered when said step (d) determines that it is unnecessary to process the high-order data of said data being considered; wherein said step (d) further comprises the step of determining whether or not said result obtained by processing the low-order data of said data being considered has a borrow, wherein said step (e) immediately processes the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when it is determined that said result has the borrow.
Claim 8
Dependent Claim 235 words
A data processing method comprising the steps of: (a) reading data from a memory via a data bus, said data having a first data length, said data being composed of low-order data and high-order data, and said data bus having a second data length less than said first data length; (b) processing said low-order data of data being considered during a first machine cycle; (c) processing said high-order data of said data being considered during a second machine cycle; (d) determining whether or not it is necessary to process the high-order data of the data being considered during said second machine cycle on the basis of a result obtained by processing the low-order data of said data being considered during said first machine cycle; and (e) immediately processing the low-order data of the data subsequent to said data being considered without writing the high-order data of said data being considered when said step (d) determines that it is unnecessary to process the high-order data of said data being considered; wherein said step (d) further comprises the step of determining whether or not said result obtained by processing the low-order data of said data being considered has a borrow, wherein said step (e) immediately processes the low-order data of data subsequent to said data being considered without processing the high-order data of said data being considered when it is determined that said result has the borrow.

References Cited (Backward Citations)

US3962684A Cited
US3978456A Cited
US4449184A Cited
US4402042A Cited
US4694391A Cited
US4514825A Cited
US4761755A Cited
US5001664A Cited
US5155843A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-04-04 1997-10-04 1998-04-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-04-04 2001-10-04 2002-04-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-04-04 2005-10-04 2006-04-05 $7700.00 Window Closed / Lapsed

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