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Process for producing an electrically conductive diffusion barrier at the metal/silicon interface of a MOS transistor

Assignee: Orange SA
•
Filing: 1991-12-13
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Granted: 1994-04-05
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Expires: 2011-12-13
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Abstract

Abstract An integrated circuit such as a MOS transistor, having an electrically conductive diffusion barrier at the metal/silicon interface and a method of manufacture therefor is disclosed. The metal/silicon interface is formed by selective metal deposition onto silicon. According to the method, the interface is subjected to a nitrogen-based plasma during a period of at least five minutes. The interface is brought to a temperature greater than 500° C. during this period, in order to create a diffusion barrier comprising a silicon nitride layer. The interface is then subjected to an annealing treatment under a neutral atmosphere so as to remove the nitrogen previously introduced into the metal. The diffusion barrier forms a linking and protecting interface between each source drain or gate zone of the MOS transistor and the corresponding layer of metal covering the latter.

Inventors

  • 👤 Bernard Vuillermoz
  • 👤 Mouloud Bakli
  • 👤 Alain Straboni

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 23:07
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0215; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01306; H10D64/01308; H10D64/01312; H10D64/60; H10D64/66; H10D64/661; H10D64/662; H10D64/664; H10P; H10P14/00; H10P14/40; H10P14/418; H10P14/42; H10P14/43; H10P14/432; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4437; H10W20/4441; H10P14/60; H10P14/65; H10P14/6516; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 108 words
A method for producing an electrically conductive diffusion barrier at a metal/silicon interface of an integrated circuit in which, following a selective deposition of metal onto silicon to form the metal/silicon interface, the method comprises the steps of: subjecting the interface to a nitrogen-based plasma during a period of at least five minutes; adjusting the temperature of the interface to greater than 500° C. during said step of subjecting to form a diffusion barrier comprising a silicon nitride layer at the interface; and annealing the interface and the diffusion barrier under a neutral atmosphere to remove nitrogen introduced into the metal during the steps of subjecting and adjusting.
Claim 2
Independent Claim 108 words
A method for producing an electrically conductive diffusion barrier at a metal/silicon interface of an integrated circuit in which, following a selective deposition of metal onto silicon to form the metal/silicon interface, the method comprises the steps of: subjecting the interface to a nitrogen-based plasma during a period of at least five minutes; adjusting the temperature of the interface to greater than 500° C. during said step of subjecting to form a diffusion barrier comprising a silicon nitride layer at the interface; and annealing the interface and the diffusion barrier under a neutral atmosphere to remove nitrogen introduced into the metal during the steps of subjecting and adjusting.
Claim 3
Dependent Claim 20 words
The method according to claim 1, wherein the step of subjecting comprises subjecting the interface to a pure nitrogen plasma.
Claim 4
Dependent Claim 19 words
The method according to claim 1, wherein the step of subjecting comprises subjecting the interface to an ammonia plasma.
Claim 5
Dependent Claim 47 words
The method according to claim 1, wherein the step of subjecting is performed for a period of ten minutes, and the step of adjusting comprises adjusting the temperature of the interface to 700° C. in order to form a diffusion barrier having a thickness of 2 nanometers.
Claim 6
Dependent Claim 31 words
The method according to claim 1, wherein the step of annealing is performed under vacuum and comprises adjusting the temperature of the interface and the diffusion barrier to approximately 850° C.

References Cited (Backward Citations)

US4847111A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-04-04 1997-10-04 1998-04-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-04-04 2001-10-04 2002-04-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-04-04 2005-10-04 2006-04-05 $7700.00 Window Closed / Lapsed

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