Electrically erasable and programmable read only memory device with simple controller for selecting operational sequences after confirmation

Claim 1

An electrically erasable and programmable read only memory device fabricated on a semiconductor chip, comprising: a) a plurality of electrically erasable and programmable memory cells for storing data bits each either first or second logic level; b) peripheral circuits for selectively carrying out an erasing operation for shifting data bit stored in the electrically erasable and programmable memory cells to said first logic level, a write-in operation for shifting data bits stored in the electrically erasable and programmable read only memory cells to said second logic level and a verifying operation for checking the data bits to see whether the data bits are in the first logic level or in the second logic level; c) a comparator operative to compare first bits of an external command signal with second bits of said external command signal to see whether or not a command indicated by said first bits is consistent with a command indicated by said second bits, and producing an enable signal when said first bits are consistent with said second bits; and d) a controller enabled with said enable signal, and selectively producing internal control signals from said external command signal for said erasing operation, said write-in operation and said verifying operation.