Current limit circuit

Claim 2

A current limit circuit for providing a control signal of a predetermined magnitude when the current passing through a circuit attains a predetermined current limit value comprising, a resistor in said circuit for sensing the magnitude of current flowing in said circuit, a P-channel field effect transistor, and NPN bipolar transistor, means connecting the drain of said field effect transistor to the base of said NPN transistor, said field effect transistor when biased conductive applying current to the base of said NPN transistor that is PG,11 high enough to cause the emitter current of said NPN transistor to attain said predetermined magnitude, means for developing and applying a substantially constant voltage to the gate of said P-channel field effect transistor, and means coupled to said resistor and to the source of said field effect transistor for developing and applying a control voltage to said source of said field effect transistor that increases to a level which will cause it to conduct when the current passing through said circuit attains said predetermined current limit value.

Claim 3

A current limit circuit for limiting the amount of load current that can flow through an electrical load in a load circuit comprising, a source of direct voltage, a load circuit connected across said source of direct voltage, said load circuit comprising in a series connection a current sensing resistor, the source and drain of a first P-channel field effect transistor and said electrical load, a second P-channel field effect transistor, an NPN bipolar transistor, means connecting the drain of said second field effect transistor to the base of said NPN transistor, means connecting the collector of said NPN transistor to one side of said source of direct voltage, means connecting the emitter of said NPN transistor to the gate of said first field effect transistor, means for developing and applying a substantially constant voltage to the gate of said second P-channel field effect transistor, and means coupled to said resistor and to the source of said second field effect transistor for developing and applying a voltage to said source of said second field effect transistor that increases to a value that is high enough to bias said second field effect transistor conductive when the level of said load current in said load circuit attains a current limit value, said second field effect transistor when biased conductive applying current to the base of said NPN transistor that causes the emitter current of said NPN transistor to attain a level that causes said first field effect transistor to limit the said load current in said load circuit to said predetermined current limit value.

Claim 4

A current limit circuit for limiting the amount of load current that can flow through an electrical load in a load circuit comprising, a source of direct voltage, a load circuit connected across said source of direct voltage, said load circuit comprising in a series connection a current sensing resistor, the source and drain of a first P-channel field effect transistor and said electrical load, a second P-channel field effect transistor, an NPN bipolar transistor, means connecting the drain of said second field effect transistor to the base of said NPN transistor, means connecting the collector of said NPN transistor to one side of said source of direct voltage, means connecting the emitter of said NPN transistor to the gate of said first field effect transistor, means for developing and applying a substantially constant voltage to the gate of said second P-channel field effect transistor, and means coupled to said resistor and to the source of said second field effect transistor for developing and applying a voltage to said source of said second field effect transistor that increases to a value that is high enough to bias said second field effect transistor conductive when the level of said load current in said load circuit attains a current limit value, said second field effect transistor when biased conductive applying current to the base of said NPN transistor that causes the emitter current of said NPN transistor to attain a level that causes said first field effect transistor to limit the said load current in said load circuit to said predetermined current limit value.