Patent EP0013326A2 successfully refreshed from Google Patents.
Patent US4434981A successfully refreshed from Google Patents.
US3896367A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for reducing turn-on and turn-off times of inductive loads
Assignee: Individual
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Filing: 1974-03-01
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Granted: 1975-07-22
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Expires: 1994-03-01
Abstract
Abstract In a circuit arrangement including an inductive load having a load winding, a control circuit for reducing the turn-on or turnoff time of the inductive load, a source of electrical current supply connected in series with the load winding, a source of control pulses, a transistor connected in series with the load winding and connected to the source of control pulses, the control circuit including a control winding inductively coupled to the load winding and the load winding inducing a voltage in the control winding when the transistor is conductive, a MOS-FET device having a gate, a drain and an source electrode, an auxiliary winding inductively coupled to the load winding and to the control winding; the auxiliary winding is connected in series with the drain and source electrodes and with the source of electric potential for inducing in the load winding by the auxiliary winding an additional current when the MOS-FET is conducting, the current having a sign directed to increase the potential present in the load winding, whereby the turn-on time of the inductive load decreases.
Inventors
- 👤 Claude Frantz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:00
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/64; H03K17/08; H03K17/081; H03K17/0814; H03K17/08142
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
349 words
A circuit for obtaining a reduced turn-on or turn-off of an inductive load, said circuit comprising, in combination: a first transistor having a collector, an emitter, and a base and operative to be conductive for a pulse signal applied to its base; a first diode connected to the collector of said first transistor and operative to be conductive when said first transistor is conductive; said inductive load including a load winding and a control winding inductively coupled to said load winding; first connecting means connecting said first diode in series connection with one end of said load winding; a voltage supply means connected in series with the other end of said load winding; a pulse signal source connected to the base of said first transistor and operative to make said first transistor conductive; a MOS-FET having gate, source and drain electrodes and having its gate coupled to one end of said control windings; a second transistor having a collector, an emitter, and a base and connected to said MOS-FET in a Darlington connection and connected to the other end of said control winding, whereby said MOS-FET becomes conductive when said first transistor is conductive; an auxiliary winding inductively coupled to said load winding and said control winding and connected at one end to said second transistor and operative for increasing the current flow in said load winding when said MOS-FET is conductive; a second diode conductively connecting said voltage supply means to said MOS-FET; a third diode conductively connected with the other of said load winding to said MOS-FET; the winding ratio of said load winding to said auxiliary winding being selected for turning on said MOS-FET by the voltage induced in said auxiliary winding by the current flowing in said load winding, during the turning off of said current and to terminate the conduction when said induced transient current is substantially zero; said auxiliary winding being operative for increasing the current flow in said load winding when said MOS-FET is conductive, whereby the turn-on time of said inductive load is substantially decreased with respect to the normal time.
Claim 2
Dependent Claim
349 words
A circuit for obtaining a reduced turn-on or turn-off of an inductive load, said circuit comprising, in combination: a first transistor having a collector, an emitter, and a base and operative to be conductive for a pulse signal applied to its base; a first diode connected to the collector of said first transistor and operative to be conductive when said first transistor is conductive; said inductive load including a load winding and a control winding inductively coupled to said load winding; first connecting means connecting said first diode in series connection with one end of said load winding; a voltage supply means connected in series with the other end of said load winding; a pulse signal source connected to the base of said first transistor and operative to make said first transistor conductive; a MOS-FET having gate, source and drain electrodes and having its gate coupled to one end of said control windings; a second transistor having a collector, an emitter, and a base and connected to said MOS-FET in a Darlington connection and connected to the other end of said control winding, whereby said MOS-FET becomes conductive when said first transistor is conductive; an auxiliary winding inductively coupled to said load winding and said control winding and connected at one end to said second transistor and operative for increasing the current flow in said load winding when said MOS-FET is conductive; a second diode conductively connecting said voltage supply means to said MOS-FET; a third diode conductively connected with the other of said load winding to said MOS-FET; the winding ratio of said load winding to said auxiliary winding being selected for turning on said MOS-FET by the voltage induced in said auxiliary winding by the current flowing in said load winding, during the turning off of said current and to terminate the conduction when said induced transient current is substantially zero; said auxiliary winding being operative for increasing the current flow in said load winding when said MOS-FET is conductive, whereby the turn-on time of said inductive load is substantially decreased with respect to the normal time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-07-21 | 1979-01-20 | 1979-07-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-07-21 | 1983-01-20 | 1983-07-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-07-21 | 1987-01-20 | 1987-07-22 | $7700.00 | Window Closed / Lapsed |