US5283786A — Burst architecture time-division switch and equip…

Claim 1

Independent Claim 241 words

Time-division switch comprising: a control arrangement further comprising at least one processor and a clock; a time-shared synchronous data bus; and a plurality of equipment access modules which are each connected to said data bus and which are each associated with a respective item of equipment and which each further comprises a multiplex link linking the equipment access module to its respective item of equipment, a bus counter clocked by clock signals currently in use on the data bus, a link counter clocked by clock signals currently in use on the multiplex link, and send and receive content-addressable memories dynamically programmed by the control arrangement to send data on the data bus from its said multiplex link and receive data on said multiplex link from the data bus, using respective multiplex link frame structures defined by and time slots selected by said control arrangement, wherein each content-addressable memory further comprises two respective time slot selection portions also under the control of the control arrangement and each operated by a respective one of said counters, a data buffer portion between the respective multiplex link and the data bus and being selectively controlled by one or the other of said respective selection potions either in write or in read mode depending on the relevant direction of sending, and a control buffer portion also under the control of the control arrangement for storing control information relating to channels corresponding to the selected time slots.

Claim 2

Dependent Claim 241 words

Time-division switch comprising: a control arrangement further comprising at least one processor and a clock; a time-shared synchronous data bus; and a plurality of equipment access modules which are each connected to said data bus and which are each associated with a respective item of equipment and which each further comprises a multiplex link linking the equipment access module to its respective item of equipment, a bus counter clocked by clock signals currently in use on the data bus, a link counter clocked by clock signals currently in use on the multiplex link, and send and receive content-addressable memories dynamically programmed by the control arrangement to send data on the data bus from its said multiplex link and receive data on said multiplex link from the data bus, using respective multiplex link frame structures defined by and time slots selected by said control arrangement, wherein each content-addressable memory further comprises two respective time slot selection portions also under the control of the control arrangement and each operated by a respective one of said counters, a data buffer portion between the respective multiplex link and the data bus and being selectively controlled by one or the other of said respective selection potions either in write or in read mode depending on the relevant direction of sending, and a control buffer portion also under the control of the control arrangement for storing control information relating to channels corresponding to the selected time slots.

Claim 3

Dependent Claim 67 words

Time-division switch according to claim 1 wherein the two time slot selection portions, the control buffer portion and the data buffer portion of each of the two content-addressable memories of a given equipment access module each include a same number of registers which is at least equal to a number of time slots of the frame governing the particular link served by the relevant equipment access module.

Claim 4

Dependent Claim 131 words

Time-division switch according to claim 2 wherein each time slot selection portion of the two content-addressable memories of a particular said equipment access module includes a number of comparator registers at least equal to the number of time slots in the frame that governs the particular link served by this equipment access module, each of said comparator registers detecting occurrence of a time slot of a determined rank during successive identical frames present either on the data bus or on the particular link being served by comparing indications supplied by a counter synchronized by said clock signals currently being used either on said data bus or on said particular link with a corresponding indication stored in said comparator register by the control arrangement of the time-division switch via a signalling bus.

Claim 5

Dependent Claim 30 words

Time-division switch according to claim 1 wherein said control arrangement is linked to the common data bus by an access module which is identical to the other equipment access modules.

Claim 6

Dependent Claim 242 words

Module for connecting an item of equipment to a time-division multiplex link forming a data bus organized in accordance with a first frame structure and shared between a plurality of identical or similar equipment access modules serving items of equipment by means of individual time-division multiplex links the frame structure of which is different from said first structure, synchronous operation of this data bus being supervised by a control structure comprising at least a processor and a clock, said module comprising a bus counter clocked by clock signals currently in use on the data bus, a link counter clocked by clock signals currently in use on the multiplex link, and two substantially identical memories respectively adapted to send from the module to the data bus and to send to said module from said data bus, each of said two memories comprising two time slot selection portions which are each under the control of the control arrangement and each addressed by a respective one of said counters, a data buffer portion inserted between the particular link being served and the data bus and selectively controlled by each selection portion either in write or in read mode depending on the relevant direction of sending, and a control buffer portion which is under the control of said control arrangement and which is associated with said data buffer portion in order to store control information relating to the channels which correspond to the selected time slots.

Claim 7

Dependent Claim 242 words

Module for connecting an item of equipment to a time-division multiplex link forming a data bus organized in accordance with a first frame structure and shared between a plurality of identical or similar equipment access modules serving items of equipment by means of individual time-division multiplex links the frame structure of which is different from said first structure, synchronous operation of this data bus being supervised by a control structure comprising at least a processor and a clock, said module comprising a bus counter clocked by clock signals currently in use on the data bus, a link counter clocked by clock signals currently in use on the multiplex link, and two substantially identical memories respectively adapted to send from the module to the data bus and to send to said module from said data bus, each of said two memories comprising two time slot selection portions which are each under the control of the control arrangement and each addressed by a respective one of said counters, a data buffer portion inserted between the particular link being served and the data bus and selectively controlled by each selection portion either in write or in read mode depending on the relevant direction of sending, and a control buffer portion which is under the control of said control arrangement and which is associated with said data buffer portion in order to store control information relating to the channels which correspond to the selected time slots.

Claim 8

Dependent Claim 60 words

Connection module according to claim 5 wherein the two time slot selection portions, the control buffer portion and the data buffer portion of each of the two content-addressable memories of the module include the same number of registers which is at least equal to the number of time slots of the frame governing the particular link served by the module.

Claim 9

Dependent Claim 119 words

Connection module according to claim 6 wherein each time slot selection portion of the two content-addressable memories of the module include comparator registers the number of which is at least equal to the number of time slots in the frame that governs the particular link served by this module, each of said comparator registers detecting occurrence of a time slot of a determined rank during successive identical frames present either on the data bus or on the particular link being served by comparing indications supplied by a counter synchronized by the clock signals currently in use either on the data bus or on the particular link with a corresponding indication stored in said comparator register by the control arrangement.

Claim 10

Dependent Claim 119 words

Connection module according to claim 5 wherein each time slot selection portion of the two content-addressable memories of the module include comparator registers the number of which is at least equal to the number of time slots in the frame that governs the particular link served by this module, each of said comparator registers detecting occurrence of a time slot of a determined rank during successive identical frames present either on the data bus or on the particular link being served by comparing indications supplied by a counter synchronized by the clock signals currently in use either on the data bus or on the particular link with a corresponding indication stored in said comparator register by the control arrangement.

Claim 11

Dependent Claim 131 words

Time-division switch according to claim 1 wherein each time slot selection portion of the two content-addressable memories of an equipment connection module includes comparator registers the number of which is at least equal to the number of time slots in the frame that governs the particular link served by this equipment access module, each of said comparator registers detecting occurrence of a time slot of a determined rank during successive identical frames present either on the data bus or on the particular link being served by comparing indications supplied by a counter synchronized by said clock signals currently being used either on said data bus or on said particular link with a corresponding indication stored in said comparator register by the control arrangement of the time-division switch via a signalling bus.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1997-01-31	1997-08-02	1998-02-01	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2001-01-31	2001-08-02	2002-02-01	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2005-01-31	2005-08-02	2006-02-01	$7700.00	Window Closed / Lapsed

Burst architecture time-division switch and equipment access module for use in a switch of this kind

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