Interruption controlling system using timer circuits

Claim 2

An interruption controlling system including: an interruption request signal line; a main processor unit connected to said interruption request signal line; and first through N-th peripheral units, each connected to said interruption request signal line, where N represents an integer greater than one; said interruption controlling system being for controlling a processing interruption request signal which is produced by each of said first through said N-th peripheral units for said main processor unit to be supplied to said interruption request signal line; said main processor unit comprising: a main processor connected to said interruption request signal line for accepting, as an accepted interruption request signal, said processing interruption request signal from said interruption request signal line; each of said first through said N-th peripheral units comprising: a subsidiary processor for producing an original interruption request signal; wherein: said interruption controlling system comprises: an interruption control signal line to which each of said first through said N-th peripheral units is connected; each of said first through said N-th peripheral units further comprising: first signal processing means connected to said interruption control signal line and said subsidiary processor for processing said original interruption request signal into an interruption control signal to continuously supply said interruption control signal to said interruption control signal line unless said interruption control signal line is already supplied with the interruption control signal from any one of said first through said N-th peripheral units; timer means connected to said interruption request signal line and said first signal processing means for carrying out, unless said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, a timer operation of timing a preselected time interval from a time instant at which said first signal processing means begins to supply said interruption control signal to said interruption control signal line, said timer means suspending the time operation thereof while said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, said timer means thereby producing a time-out signal when said timer means times said preselected time interval; and second signal processing means connected to said interruption request signal line, said subsidiary processor, and said timer means for processing said original interruption request signal into said processing interruption request signal in response to said time-out signal to continuously supply said processing interruption request signal to said interruption request signal line; the timer means of said first through said N-th peripheral units being for carrying out the timer operations of timing the preselected time intervals which are different from each other.

Claim 3

An interruption controlling system including: an interruption request signal line; a main processor unit connected to said interruption request signal line; and first through N-th peripheral units, each connected to said interruption request signal lien, where N represents an integer greater than one; said interruption controlling system being for controlling a processing interruption request signal which is produced by each of said first through said N-th peripheral units for said main processor unit to be supplied to said interruption request signal line; said main processor unit comprising: a main processor connected to said interruption request signal line for accepting, as an accepted interruption request signal, said processing interruption request signal from said interruption request signal line; each of said first through said N-th peripheral units comprising: a subsidiary processor for producing an original interruption request signal; wherein: said interruption controlling system comprises: an interruption control signal line to which each of said first through said N-th peripheral units is connected; and a clock pulse line; said main processor unit further comprising: a clock pulse generator connected to said clock pulse line for generating a sequence of clock pulses to successively supply said clock pulses to said clock pulse line; each of said first through said N-th peripheral units further comprising: first signal processing means connected to said interruption control signal line and said subsidiary processor for processing said original interruption request signal into an interruption control signal to continuously supply said interruption control signal to said interruption control signal line unless said interruption control signal line is already supplied with the interruption control signal from any one of said first through said N-th peripheral units; timer means connected to said interruption request signal line, said clock pulse line, and said first signal processing means for carrying out, unless said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, a timer operation of timing a preselected time interval in response to said clock pulses from a time instant at which said first signal processing means begins to supply said interruption control signal to said interruption control signal line, said timer means suspending the timer operation thereof while said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, said timer means thereby producing a time-out signal when said timer means times said preselected time interval; and second signal processing means connected to said interruption request signal line, said subsidiary processor, and said timer means for processing said original interruption request signal into said processing interruption request signal in response to said time-out signal to continuously supply said processing interruption request signal to said interruption request signal line; the timer means of said first through said N-th peripheral units being for carrying out the timer operations of timing, in response to said clock pulses, the preselected time intervals which are different from each other.

Claim 4

An interruption controlling system including: an interruption request signal line; a main processor unit connected to said interruption request signal line; and first through N-th peripheral units, each connected to said interruption request signal lien, where N represents an integer greater than one; said interruption controlling system being for controlling a processing interruption request signal which is produced by each of said first through said N-th peripheral units for said main processor unit to be supplied to said interruption request signal line; said main processor unit comprising: a main processor connected to said interruption request signal line for accepting, as an accepted interruption request signal, said processing interruption request signal from said interruption request signal line; each of said first through said N-th peripheral units comprising: a subsidiary processor for producing an original interruption request signal; wherein: said interruption controlling system comprises: an interruption control signal line to which each of said first through said N-th peripheral units is connected; and a clock pulse line; said main processor unit further comprising: a clock pulse generator connected to said clock pulse line for generating a sequence of clock pulses to successively supply said clock pulses to said clock pulse line; each of said first through said N-th peripheral units further comprising: first signal processing means connected to said interruption control signal line and said subsidiary processor for processing said original interruption request signal into an interruption control signal to continuously supply said interruption control signal to said interruption control signal line unless said interruption control signal line is already supplied with the interruption control signal from any one of said first through said N-th peripheral units; timer means connected to said interruption request signal line, said clock pulse line, and said first signal processing means for carrying out, unless said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, a timer operation of timing a preselected time interval in response to said clock pulses from a time instant at which said first signal processing means begins to supply said interruption control signal to said interruption control signal line, said timer means suspending the timer operation thereof while said interruption request signal line is supplied with the processing interruption request signal from any one of said first through said N-th peripheral units, said timer means thereby producing a time-out signal when said timer means times said preselected time interval; and second signal processing means connected to said interruption request signal line, said subsidiary processor, and said timer means for processing said original interruption request signal into said processing interruption request signal in response to said time-out signal to continuously supply said processing interruption request signal to said interruption request signal line; the timer means of said first through said N-th peripheral units being for carrying out the timer operations of timing, in response to said clock pulses, the preselected time intervals which are different from each other.