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US5280455A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage supply circuit for use in an integrated circuit

Assignee: Sony Corp
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Filing: 1991-04-05
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Granted: 1994-01-18
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Expires: 2011-04-05
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Abstract

Abstract The invention relates to a voltage supply circuit used in a semiconductor integrated circuit wherein switching between voltages generated is carried out in dependency upon whether the circuit is in an ordinary operating state or in a standby state. This voltage supply circuit includes a first reference voltage generator for supplying a reference voltage through an amplifier circuit to an internal circuit in the operating state, and a power supply voltage converter for supplying a voltage to the internal circuit at least in the standby state, wherein a second reference voltage generator provided independently of the first reference voltage generator becomes operative for a transient time period during which the second reference voltage generator shifts from the standby state to the operating state. By the action of the second reference voltage generator, a setup time at the time of start of the operation is shortened. Further, by allowing the first reference voltage generator to be inactive in the standby state, low power consumption is realized.

Inventors

  • 👤 Yoshikazu Kanaishi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 08:04
CPC Classifications
G; G11; G11C; G11C5/00; G11C5/14; G11C5/147; G11C11/00; G11C11/21; G11C11/34

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 106 words
A voltage supply circuit for supplying a reference voltage to an internal circuit of a semiconductor integrated circuit device to allow said internal circuit to be operative, said voltage supply circuit comprising: a first reference voltage generator for supplying a reference voltage through an amplifier circuit to said internal circuit in an operating state, and caused to be inactive in a standby state, a power supply voltage converter for supplying a voltage to said internal circuit at least in said standby state, and a second reference voltage generator for driving said amplifier circuit during a transient time period from said standby state to said operating state.
Claim 2
Dependent Claim 106 words
A voltage supply circuit for supplying a reference voltage to an internal circuit of a semiconductor integrated circuit device to allow said internal circuit to be operative, said voltage supply circuit comprising: a first reference voltage generator for supplying a reference voltage through an amplifier circuit to said internal circuit in an operating state, and caused to be inactive in a standby state, a power supply voltage converter for supplying a voltage to said internal circuit at least in said standby state, and a second reference voltage generator for driving said amplifier circuit during a transient time period from said standby state to said operating state.
Claim 3
Dependent Claim 70 words
A voltage supply circuit as set forth in claim 1, wherein there is provided a changeover switch in association with an input terminal of said amplifier circuit, said first reference voltage generator being connected to said amplifier circuit in said operating state by said changeover switch, said second reference voltage generator being connected to said amplifier circuit during a transient time period from said standby state to said operating state.
Claim 4
Dependent Claim 23 words
A voltage supply circuit as set forth in claim 2, wherein said amplifier circuit is caused to be inactive in said standby state.
Claim 5
Dependent Claim 42 words
A voltage supply circuit as set forth in claim 2, wherein whether said first reference voltage generator is active or inactive, and how said changeover switch is switched are controlled by a chip enable signal or a chip select signal externally given.
Claim 6
Dependent Claim 40 words
A voltage supply circuit as set forth in claim 1, wherein said second reference voltage generator is comprised of a plurality of MOS transistors subjected to diode connection, which are connected in series to an output terminal through a resistor.
Claim 7
Dependent Claim 33 words
A voltage supply circuit as set forth in claim 5, wherein a gate electrode of the MOS transistor connected to said resistor and an external power supply terminal are subjected to capacitance coupling.
Claim 8
Dependent Claim 98 words
A semiconductor memory device in which a static RAM is provided as an internal circuit, said device comprising: a static RAM, a first reference voltage generator for supplying an internally pulled down reference voltage through an amplifier circuit to said static RAM in an operating state, and caused to be inactive in a standby state, a power supply voltage converter for supplying a voltage to said static RAM at least in said standby state, and a second reference voltage generator for driving said amplifier circuit during a transient time period from said standby state to said operating state.
Claim 9
Dependent Claim 98 words
A semiconductor memory device in which a static RAM is provided as an internal circuit, said device comprising: a static RAM, a first reference voltage generator for supplying an internally pulled down reference voltage through an amplifier circuit to said static RAM in an operating state, and caused to be inactive in a standby state, a power supply voltage converter for supplying a voltage to said static RAM at least in said standby state, and a second reference voltage generator for driving said amplifier circuit during a transient time period from said standby state to said operating state.
Claim 10
Dependent Claim 76 words
A semiconductor memory device as set forth in claim 7, said static RAM including a memory cell array including memory cells each comprised of a MOS transistor, wherein each of said memory cells includes a pair of flip-flop circuits having a resistor element as a load, said second reference voltage generator being comprised of a plurality of MOS transistors subjected to diode connection, which are connected in series through a resistor element to an output terminal.

References Cited (Backward Citations)

US4788450A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-01-17 1997-07-19 1998-01-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-01-17 2001-07-19 2002-01-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-01-17 2005-07-19 2006-01-18 $7700.00 Window Closed / Lapsed

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