Bus arbitration system for granting bus access to devices following two-wire bus arbitration protocol and devices following three-wire bus arbitration protocol

Claim 2

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol and to devices following three-wire bus arbitration protocol comprising: means for receiving a plurality of bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus; a prioritizer, for receiving said bus request signals from the receiving means and assigning respective priority levels to said bus request signals; arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of said bus request signals has the highest priority; means for determining whether the highest priority device has a 24 bit address, and therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol; and bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being generated after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said arbiter means transmits from its memory to said bus granting means whether said device having the highest priority is a device following two-wire bus arbitration protocol or a device following a three-wire bus arbitration protocol, said bus granting means further including interfacing means for following two-wire bus arbitration protocol if said device follows two-wire bus arbitration protocol and for following three-wire bus arbitration protocol if the device follows three-wire bus arbitration protocol.

Claim 3

A bus arbitration system according to claim 1, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.

Claim 4

A bus arbitration system according to claim 1, further including snooper logic means for determining whether said previous device is currently accessing the bus, said snooper means delaying said highest priority device from accessing the bus until the previous device relinquishes the bus.

Claim 5

A bus arbitration system according to claim 1, further comprising bus contention detecting means for detecting if an unauthorized device is accessing the expansion bus, and if so, signalling an error condition to the bus arbitration system.

Claim 6

A bus arbitration according to claim 1, further comprising selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol.

Claim 7

A bus arbitration system according to claim 1, further comprising buffered direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.

Claim 8

A bus arbitration system according to claim 1, wherein said device following two-wire bus arbitration protocol is a 32 bit device.

Claim 9

A bus arbitration system according to claim 1, wherein said device following three-wire bus arbitration protocol is a 16 bit device.

Claim 10

A bus arbitration system according to claim 1, further comprising multiple transfer means for allowing a device to transfer extended cycles across the expansion bus comprising multiple 32 bit cycles.

Claim 11

A bus arbitration system according to claim 1, further comprising means for asserting a full cycle strobe, said asserting means being activated when a device following two-wire bus arbitration protocol is accessing the expansion bus and initiates a read or write cycle.

Claim 12

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol and to devices following three-wire bus arbitration protocol comprising: means for receiving a plurality of bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus; selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol; a prioritizer, for receiving said bus request signals from the receiving means and for assigning respective priority levels to said bus request signals; means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol; bus granting means, electrically connected to the prioritizer, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus; and buffer direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.

Claim 13

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol and to devices following three-wire bus arbitration protocol comprising: means for receiving a plurality of bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus; selection means for selecting out those devices following two-wire bus arbitration protocol from those devices which follow three-wire bus arbitration protocol; a prioritizer, for receiving said bus request signals from the receiving means and for assigning respective priority levels to said bus request signals; means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol; bus granting means, electrically connected to the prioritizer, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus; and buffer direction means for determining the direction of data flow on the expansion bus according to an instruction received by the device currently accessing the expansion bus.

Claim 14

A bus arbitration system according to claim 11, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.

Claim 15

A bus arbitration system according to claim 11, further comprising bus contention detecting means for detecting if an unauthorized device is accessing the expansion bus, and if so, signalling an error condition to the bus arbitration system.

Claim 16

A bus arbitration system according to claim 11, wherein said device following two-wire bus arbitration protocol is a 32 bit device.

Claim 17

A bus arbitration system according to claim 11, wherein said device following three-wire bus arbitration protocol is a 16 bit device.

Claim 18

A bus arbitration system according to claim 11, wherein said two-wire bus arbitration protocol devices and said three-wire bus arbitration protocol devices further includes interrupt generating means for generating interrupts.

Claim 19

A bus arbitration system according to claim 16, wherein said expansion bus further includes polling means for transmitting a polling inquiry after the receipt of an interrupt transmitted from said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device.

Claim 20

A bus arbitration system according to claim 17, wherein said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device further includes asserting means for asserting an interrupt response to the polling inquiry by said expansion bus.

Claim 21

A bus arbitration system according to claim 17, wherein said two-wire bus arbitration protocol device or said three-wire bus arbitration protocol device further including vector asserting means for asserting a vector in response to the polling inquiry of said expansion bus.

Claim 22

A bus arbitration system according to claim 19, wherein said expansion bus further includes terminating means for terminating the interrupt if no two-wire bus arbitration protocol device or three-wire bus arbitration protocol device responds to the polling inquiry of said expansion bus.

Claim 23

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol comprising: means for receiving a plurality of synchronous bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus; a prioritizer, for receiving said bus request signals from the receiving means and assigning respective priority levels to said bus request signals; arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of said bus request signals has the highest priority; means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol; and bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said expansion bus asserts a full-cycle strobe which when activated allows the two-wire bus arbitration protocol device to access the expansion bus and initiate a read or write cycle.

Claim 24

A bus arbitration system for granting access to an expansion bus to devices following two-wire bus arbitration protocol comprising: means for receiving a plurality of synchronous bus request signals from a plurality of devices, each of said bus request signals comprising at least one coded pulse and having a predetermined priority, each of said bus request signals being used to request access to the expansion bus; a prioritizer, for receiving said bus request signals from the receiving means and assigning respective priority levels to said bus request signals; arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of said bus request signals has the highest priority; means for determining whether the highest priority device has a 24 bit address and, therefore, follows three-wire bus arbitration protocol or has a 32 bit address and, therefore, follows two-wire bus arbitration protocol; and bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being granted after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said expansion bus asserts a full-cycle strobe which when activated allows the two-wire bus arbitration protocol device to access the expansion bus and initiate a read or write cycle.

Claim 25

A bus arbitration system according to claim 21, further including accessing means for allowing three-wire bus arbitration protocol devices to access the expansion bus.

Claim 26

A bus arbitration protocol device according to claim 22, wherein said prioritizer further includes assigning means for assigning devices following two-wire bus arbitration protocol a higher priority than devices following three-wire bus arbitration protocol.

Claim 27

A bus arbitration system according to claim 23, wherein said bus granting means further includes interfacing means for following two-wire bus arbitration protocol if said device follows two-wire bus arbitration protocol and for following three-wire bus arbitration protocol if the device follows three-wire bus arbitration protocol.

Claim 28

A bus arbitration system according to claim 24, further comprising selection means for selecting out those devices following two-wire bus arbitration protocol from those devices following three-wire bus arbitration protocol.

Claim 29

A bus arbitration system according to claim 24, wherein said device following two-wire bus arbitration protocol is a 32 bit device.

Claim 30

A bus arbitration system according to claim 24, wherein said device following three-wire bus arbitration protocol is a 16 bit device.

Claim 31

A bus arbitration system according to claim 21, further including snooper logic means for determining whether said previous device is currently accessing the bus, said snooper means delaying said highest priority device from accessing the bus until the previous device relinquishes the bus.

Claim 32

A bus arbitration system according to claim 21, further comprising bus contention detecting means for detecting if an unauthorized device is accessing the expansion bus, and if so, signalling an error condition to the bus arbitration system.

Claim 33

A bus arbitration system for granting access to an expansion bus to devices following a first bus arbitration protocol and to devices following a second bus arbitration protocol, comprising: means for receiving a plurality of bus request signals from a plurality of devices, each of the bus request signals comprising at least one coded pulse and having a predetermined priority, each of the bus request signals being used to request access to the expansion bus; a prioritizer, for receiving the bus request signals from the receiving means and for assigning respective priority levels to the bus request signals; arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of the bus request signals has the highest priority; means for determining whether the highest priority device has an address in accordance with the first bus arbitration protocol and, therefore, follows the first bus arbitration protocol, or has an address in accordance with the second bus arbitration protocol and, therefore, follows the second bus arbitration protocol; and bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being generated after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said arbiter means transmits from its memory to said bus granting means whether said device having the highest priority is a device following the first bus arbitration protocol or a device following the second bus arbitration protocol, said bus granting means further including interacting means for following the first bus arbitration protocol if the device follows the first bus arbitration protocol, and for following the second bus arbitration protocol if the device follows the second bus arbitration protocol.

Claim 34

A bus arbitration system for granting access to an expansion bus to devices following a first bus arbitration protocol and to devices following a second bus arbitration protocol, comprising: means for receiving a plurality of bus request signals from a plurality of devices, each of the bus request signals comprising at least one coded pulse and having a predetermined priority, each of the bus request signals being used to request access to the expansion bus; a prioritizer, for receiving the bus request signals from the receiving means and for assigning respective priority levels to the bus request signals; arbiter means comprising means for receiving the priority levels from the prioritizer, and means for determining and storing in memory which of the bus request signals has the highest priority; means for determining whether the highest priority device has an address in accordance with the first bus arbitration protocol and, therefore, follows the first bus arbitration protocol, or has an address in accordance with the second bus arbitration protocol and, therefore, follows the second bus arbitration protocol; and bus granting means, electrically connected to the arbiter means, for granting access to the expansion bus to the device having the highest priority independent of physical position of the device, the access being generated after a previous device, if any, has relinquished the bus, and after earlier in time bus requests have been serviced if the device having the highest priority was previously granted access to the expansion bus, whereby said arbiter means transmits from its memory to said bus granting means whether said device having the highest priority is a device following the first bus arbitration protocol or a device following the second bus arbitration protocol, said bus granting means further including interacting means for following the first bus arbitration protocol if the device follows the first bus arbitration protocol, and for following the second bus arbitration protocol if the device follows the second bus arbitration protocol.