← Back to Patent Explorer
US5276289A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic circuit device and method of producing the same

Assignee: Hitachi Ltd
•
Filing: 1991-03-25
•
Granted: 1994-01-04
•
Expires: 2011-03-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The present invention provides a multistep electronic circuit device comprising a plurality of parts and elements mechanically or electrically bonded in sequence to each other and to a substrate with a plurality of solders, which comprises as the parts and elements the substrate, input and output pins and LSI chips, and optionally packages and a cooler bonded through multistep bonding, the bondings of the parts and elements including at least one CCB bonding and at least one sealing, the solders each having a lower melting point than the heatproof temperature of the part or element to be bonded with the solder, and one of the solders having a melting point of at least 10 degrees C. lower than that of the other solder used at the bonding step immediately before. The solders used are selected from Au10-15wt%Ge alloy (melting point: 356 degrees-450 degrees C.), Pb1-5wt%Sn alloy (melting point: 314 degrees-325 degrees C.), Pb10-13wt%Sn alloy (melting point: 270 degrees-300 degrees C.), Au20wt%Sn alloy (melting point: 280 degrees C.), Sn3-6wt%Sb alloy (melting point: 232 degrees-243 degrees C.), Sn2-8wt%Ag alloy (melting point: 221 degrees-235 degrees C.), Sn35-55wt%Pb alloy (melting point: 183 degrees -200 degrees C.) and Sn45wt%Pb18wt%Bi (melting point: 135 degrees-160 degrees C.).

Inventors

  • 👤 Ryohei Satoh
  • 👤 Fumiyuki Kobayashi
  • 👤 Yutaka Watanabe
  • 👤 Tositada Netsu
  • 👤 Mitugu Shirai
  • 👤 Kenji Takeda
  • 👤 Masahide Harada
  • 👤 Kiyoshi Matsui
  • 👤 Hideaki Sasaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 18:52
CPC Classifications
B; B23; B23K; B23K35/00; B23K35/22; B23K35/24; B23K35/30; H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/346; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W76/00; H10W76/40; H10W76/60; H10W90/00; H10W90/401; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/094; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10704; H05K2201/10734; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20; H10W72/851; H10W72/874; H10W72/877

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 150 words
A multistep electronic device which comprises semiconductor chips, first substrates, first sealing packages, second substrates, second sealing packages, and input and output pins, said semiconductor chips being bonded to said first substrates on one side thereof and surrounded by said first sealing packages, said first sealing packages being bonded to the first substrates via a first solder, said first substrates with said semiconductor chips and said first sealing packages provided thereon being bonded on the other side thereof to said second substrates on one side thereof and surrounded by said second sealing packages, said second sealing packages being bonded to the second substrates via a second solder, and said input and output pins being bonded to said second substrates on the other side thereof, wherein a plurality of semiconductor chips, surrounded by first sealing packages, are provided on a single second substrate and surrounded by a single second sealing package.
Claim 2
Dependent Claim 150 words
A multistep electronic device which comprises semiconductor chips, first substrates, first sealing packages, second substrates, second sealing packages, and input and output pins, said semiconductor chips being bonded to said first substrates on one side thereof and surrounded by said first sealing packages, said first sealing packages being bonded to the first substrates via a first solder, said first substrates with said semiconductor chips and said first sealing packages provided thereon being bonded on the other side thereof to said second substrates on one side thereof and surrounded by said second sealing packages, said second sealing packages being bonded to the second substrates via a second solder, and said input and output pins being bonded to said second substrates on the other side thereof, wherein a plurality of semiconductor chips, surrounded by first sealing packages, are provided on a single second substrate and surrounded by a single second sealing package.
Claim 3
Dependent Claim 32 words
A multistep electronic device according to claim 1, wherein said semiconductor chips and said first sealing packages are bonded through a solder to each other on the surfaces thereof facing each other.
Claim 4
Dependent Claim 32 words
A multistep electronic device according to claim 1, wherein said first sealing packages and said second sealing packages are bonded through a solder to each other on the surfaces facing each other.
Claim 5
Dependent Claim 42 words
A multistep electronic device according to claim 1, wherein the first solder has a lower tensile strength than that of material of the first substrates, and the second solder has a lower tensile strength than that of material of the second substrates.
Claim 6
Dependent Claim 37 words
A multistep electronic device according to claim 1, wherein said semiconductor chips are bonded to the first substrates by a flip-chip bond, and wherein said first substrates are bonded to the second substrates by a flip-chip bond.
Claim 7
Dependent Claim 31 words
A multistep electronic device according to claim 1, wherein said semiconductor chips are bonded to the inside of the first sealing packages so as to dissipate heat from the semiconductor chips.
Claim 8
Dependent Claim 124 words
A multistep electronic device which comprises semiconductor chips, first substrates, first sealing packages, second substrates, second sealing packages, and input and output pins, said semiconductor chips being bonded to said first substrates on one side thereof and surrounded by said first sealing packages, said first sealing packages being bonded to the first substrates via a first solder, said first substrates with said semiconductor chips and said first sealing packages provided thereon being bonded on the other side thereof to said second substrates on one side thereof and surrounded by said second sealing packages, said second sealing packages being bonded to the second substrates via a second solder, and said input and output pins being bonded to said second substrates on the other side thereof.
Claim 9
Dependent Claim 124 words
A multistep electronic device which comprises semiconductor chips, first substrates, first sealing packages, second substrates, second sealing packages, and input and output pins, said semiconductor chips being bonded to said first substrates on one side thereof and surrounded by said first sealing packages, said first sealing packages being bonded to the first substrates via a first solder, said first substrates with said semiconductor chips and said first sealing packages provided thereon being bonded on the other side thereof to said second substrates on one side thereof and surrounded by said second sealing packages, said second sealing packages being bonded to the second substrates via a second solder, and said input and output pins being bonded to said second substrates on the other side thereof.

References Cited (Backward Citations)

EP0055378A2 Cited
US4561011A Cited
US4673772A Cited
JPH01184995A Cited
US4970577A Cited
US5045922A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-01-03 1997-07-05 1998-01-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-01-03 2001-07-05 2002-01-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-01-03 2005-07-05 2006-01-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag