Patent US5270531A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5270531A Expired / Lapsed US ⏱️ 0.0 years remaining

Source follower circuit for image sensor

Assignee: Sony Corp
•
Filing: 1992-12-23
•
Granted: 1993-12-14
•
Expires: 2012-12-23
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract The present invention is directed to a solid state image sensing device which can reduce a consumed amount of an electric power. During a horizontal blanking period, a vertical scanning pulse of 5 V is supplied to a vertical selection line (2A) from a vertical scanning circuit (3). In synchronism therewith, a voltage (φI) is changed from 5 V to 0 V and a voltage (φVGG) is changed from 0 V to 5 V. Thus, a source switch transistor (6) is turned off and a load transistor (9) is turned on, whereby a source follower circuit formed by a pixel transistor (12) and the load transistor (9) of a unit pixel (1) is set in the operable state to read an electrical signal accumulated in the unit pixel (1). According to the present invention, the load transistor (9) is turned on by the application of the voltage (φVGG) only during the electrical signal read-out period and the dark signal read-out period of the unit pixel within the horizontal blanking period. Since a current is flowed to the pixel transistor (12) by a power supply (7) only during this period, a consumed electric power can be reduced considerably as compared with the prior art.

Inventors

  • 👤 Kazuya Yonemoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 20:20
CPC Classifications
H; H04; H04N; H04N23/00; H04N23/10; H04N23/12; H04N25/00; H04N25/70; H04N25/76

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 108 words
A solid state image sensing device comprising: (a) a plurality of pixels, each being formed of a photosensitive element and a pixel transistor, being arrayed in horizontal and vertical directions in a two-dimensional fashion, a gate electrode and a source electrode of said each pixel transistor being connected to a vertical selection line and a vertical signal output line, respectively, and; (b) a load transistor, a drain electrode of said load transistor being connected to said source electrode of said pixel transistor to thereby form a source follower circuit, wherein said load transistor is turned on only during a pixel signal read-out period within a horizontal blanking period.
Claim 2
Dependent Claim 108 words
A solid state image sensing device comprising: (a) a plurality of pixels, each being formed of a photosensitive element and a pixel transistor, being arrayed in horizontal and vertical directions in a two-dimensional fashion, a gate electrode and a source electrode of said each pixel transistor being connected to a vertical selection line and a vertical signal output line, respectively, and; (b) a load transistor, a drain electrode of said load transistor being connected to said source electrode of said pixel transistor to thereby form a source follower circuit, wherein said load transistor is turned on only during a pixel signal read-out period within a horizontal blanking period.
Claim 3
Dependent Claim 102 words
A solid state image sensing device comprising: (a) a plurality of pixels, each being formed of a photosensitive element and a pixel transistor, being arrayed in horizontal and vertical directions in a two-dimensional fashion, a gate electrode and a source electrode of said each pixel transistor being connected to a vertical selection line and a vertical signal output line, respectively, and; (b) a load transistor, a drain electrode of said load transistor being connected to said source electrode of said pixel transistor to thereby form a source follower circuit, wherein said load transistor is turned on only during a horizontal blanking period.
Claim 4
Dependent Claim 102 words
A solid state image sensing device comprising: (a) a plurality of pixels, each being formed of a photosensitive element and a pixel transistor, being arrayed in horizontal and vertical directions in a two-dimensional fashion, a gate electrode and a source electrode of said each pixel transistor being connected to a vertical selection line and a vertical signal output line, respectively, and; (b) a load transistor, a drain electrode of said load transistor being connected to said source electrode of said pixel transistor to thereby form a source follower circuit, wherein said load transistor is turned on only during a horizontal blanking period.
Claim 5
Dependent Claim 35 words
The solid state image sensing device according to claim 2, wherein said load transistor is turned on only during said pixel signal read-out period and a dark signal read-out period within said horizontal blanking period.
Claim 6
Dependent Claim 53 words
The solid state image sensing device according to claim 1, further comprising a power supply and a source switch transistor whose main current path is connected in series between said power supply and said vertical signal output line and said source switch transistor is turned off when said load transistor is turned on.
Claim 7
Dependent Claim 115 words
Ths solid state image sensing device according to claim 1, wherein said pixel transistor comprises a first well of a second conductivity type (N-type) formed on a semiconductor substrate of a first conductivity type (P-type), a second well of the first conductivity type (P-type) formed on said first well, source and drain regions formed within said second well, a channel region formed between said source and drain regions, a source electrode connected to said source region, a drain electrode connected to said drain region, and a gate electrode formed through an insulating layer on said channel region and the drain electrode of said load transistor is connected to said source electrode of said pixel transistor.

References Cited (Backward Citations)

US5128735A Cited
US5023443A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-12-13 1997-06-14 1997-12-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-12-13 2001-06-14 2001-12-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-12-13 2005-06-14 2005-12-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag