Patch panel for high speed twisted pair

Claim 1

A connector panel for transmitting telecommunication signals, said panel comprising: (a) a jack having a dielectric housing, a plurality of jack springs contained within said housing and including at least a first, second, third and fourth pairs of tip and ring springs disposed in generally parallel side-by-side alignment and terminating at first through fourth tip and ring jack spring contact points disposed exterior of said housing; (b) a connector block having at least a first, second, third and fourth pairs of tip and ring connectors terminating at first through fourth tip and ring connector contact points; (c) a printed circuit board (i) having a first array of at least eight contact locations aligned to receive individual ones of said jack spring contact points, said first array including first through fourth pairs of tip and ring contact locations electrically connected to said first through fourth tip and ring jack spring contact points, respectively; (ii) a second array of contact locations aligned to receive individual ones of said exposed connector contact points, said second array including first through fourth pairs of tip and ring contact location electrically connected to said first through fourth tip and ring jack spring contact points, respectively; (iii) at least eight electrical paths formed on said printed circuit board and including: (A) a first tip path connecting said first tip contact locations of said first and second arrays and cooperating with said first tip spring to define a first tip circuit path; (B) a first ring path connecting said first ring contact locations of said first and second arrays and cooperating with said first ring spring to define a first ring circuit path, said first tip and ring circuit paths comprising a first pair of paths; (C) a second tip path connecting said second tip contact locations of said first and second arrays and cooperating with said second tip spring to define a second tip circuit path; (D) a second ring path connecting said second ring contact locations of said first and second arrays and cooperating with said second ring spring to define a second ring circuit path, said second tip and ring circuit paths comprising a second pair of paths; (E) a third tip path connecting said third tip contact locations of said first and second arrays and cooperating with said third tip spring to define a third tip circuit path; (F) a third ring path connecting said third ring contact locations of said first and second arrays and cooperating with said third ring spring to define a third ring circuit path, said third tip and ring circuit paths comprising a third pair of paths; (G) a fourth tip path contacting said fourth tip contact locations of said first and second arrays and cooperating with said fourth tip spring to define a fourth tip circuit path; (H) a fourth ring path connecting said fourth ring contact locations of said first and second arrays and cooperating with said fourth ring spring to define a fourth ring circuit path, said fourth tip and ring circuit paths comprising a fourth pair of paths; (iv) said first through fourth tip paths, said first through fourth ring paths and said springs mutually disposed for said tip and ring circuit paths of at least one of said first and second pairs to cross-over and to cross relative to tip and ring circuit paths of the other of said first and second pairs; (v) said third tip circuit path and said third ring circuit path disposed to cross over one another; (vi) said fourth tip circuit path and said fourth ring circuit path disposed to cross over one another.