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US5268764A Expired / Lapsed US ⏱️ 0.0 years remaining

Signal output circuit for image sensor

Assignee: Rohm Co Ltd
•
Filing: 1992-03-13
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Granted: 1993-12-07
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Expires: 2012-03-13
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Abstract

Abstract A signal output circuit is used for an IC-patterned image sensor, including, at its signal processing part, source-follower amplifiers for converting a high impedance image signal to a low impedance image signal. To eliminate offset voltages of the amplifiers, an amplifier for converting the impedance of the image signal is disposed in parallel to an amplifier for converting an impedance of a reference voltage. A differential amplifier is used to calculate a difference between the foregoing two amplifiers. The signal output circuit includes a trimming circuit to adjust an offset voltage of these amplifiers.

Inventors

  • 👤 Osamu Kihara
  • 👤 Kensuke Sawase

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 21:57
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/60; H04N25/63; H04N25/633

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 171 words
A signal output circuit for reading and outputting pixel data stored in an image sensor composed of a plurality of juxtaposed light receiving elements, said signal output circuit comprising: (a) a read timing generating circuit for generating successive read timing signals; (b) switching elements connected to the light receiving elements so as to output signals for the light receiving elements in response to the read timing signal, said switching elements being successively turned on in response to the read timing signal; (c) reset switching elements for simultaneously resetting outputs of the light receiving elements, said reset switching elements being connected to said switching elements; and (d) an output circuit for successively outputting the signals from the said light receiving elements, said output circuit including a first amplifier for receiving a reference voltage, a second amplifier for receiving the signals outputted from said light receiving elements, a differential amplifier for differentiating the outputs of said first and second amplifiers, and an adjusting circuit for supplying a null-adjusted value to said second amplifier.
Claim 2
Dependent Claim 171 words
A signal output circuit for reading and outputting pixel data stored in an image sensor composed of a plurality of juxtaposed light receiving elements, said signal output circuit comprising: (a) a read timing generating circuit for generating successive read timing signals; (b) switching elements connected to the light receiving elements so as to output signals for the light receiving elements in response to the read timing signal, said switching elements being successively turned on in response to the read timing signal; (c) reset switching elements for simultaneously resetting outputs of the light receiving elements, said reset switching elements being connected to said switching elements; and (d) an output circuit for successively outputting the signals from the said light receiving elements, said output circuit including a first amplifier for receiving a reference voltage, a second amplifier for receiving the signals outputted from said light receiving elements, a differential amplifier for differentiating the outputs of said first and second amplifiers, and an adjusting circuit for supplying a null-adjusted value to said second amplifier.
Claim 3
Dependent Claim 33 words
A signal output circuit according to claim 1, wherein said light receiving elements, read timing signal generating circuit, read switching elements, reset switching elements and output circuit are made of an integrated circuit.
Claim 4
Dependent Claim 27 words
A signal output circuit according to claim 1, wherein said adjusting circuit includes a trimming circuit whose output voltage is adjusted by a plurality of trimming fuses.
Claim 5
Dependent Claim 71 words
A signal output circuit according to claim 1, wherein inputs of said first and second amplifiers are respectively connected to MOS transistors, a dummy signal corresponding to dark level of the image is applied to a common drain terminal of said MOS transistors, the reference voltage is applied to gate of one of said MOS transistors, and an image input is applied to gate of the other of said MOS transistor.

References Cited (Backward Citations)

US4700231A Cited
US4839729A Cited
US5132801A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-12-06 1997-06-07 1997-12-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-12-06 2001-06-07 2001-12-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-12-06 2005-06-07 2005-12-07 $7700.00 Window Closed / Lapsed

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