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US4700231A Expired / Lapsed US ⏱️ 0.0 years remaining

Solid state image sensing device

Assignee: Olympus Corp
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Filing: 1985-04-12
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Granted: 1987-10-13
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Expires: 2005-04-12
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Abstract

Abstract A solid state image sensing device including a number of pixels arranged in a matrix form and comprised of lateral or vertical static induction transistors formed in a semiconductor chip, and a dummy pixel array arranged along a column in the chip and shielded from an incident light input. When successive pixels on a row are read out to derive picture signals, a dummy pixel on the same row is repeatedly read out to derive dark signals in synchronism with the reading out operation for respective pixels on the same row. A differential amplifier is formed in the semiconductor chip to derive a difference signal between a picture signal and a dark signal which are read out simultaneously.

Inventors

  • 👤 Kazuya Matsumoto

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 10:52
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/60; H04N25/63; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/196

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 359 words
A solid state image sensing device comprising: a semiconductor chip upon which a light input is made incident; a plurality of pixels formed in said semiconductor chip in a matrix, each pixel comprising a lateral type static induction transistor, including: a substrate having a high resistance; a semiconductor layer of a first conductivity type applied on a surface of said substrate, said semiconductor layer having a surface; a source region of said first conductivity type formed in the surface of said semiconductor layer; a drain region of said first conductivity type formed in the surface of said semiconductor layer; and gate means, formed in the surface of said semiconductor layer between said source and drain regions, for storing photocarriers generated by a light excitation, and for controlling a source-drain current flowing in parallel with the surface of said semiconductor layer according to an amount of said stored photocarriers multiplied by an amplification factor; scanning means including column and row lines connected to said pixels, horizontal and vertical scanning circuits coupled to said column and row lines, respectively, and a first video output line for scanning said pixels in a XY address mode to generate on said first video output line a picture signal which is inversely proportional to an amount of said light input; dark signal generating means including a second video output line and means for producing on said second video output line a dark signal which is substantially inversely proportional to a dark current generated in said lateral static induction transistor, said dark signal generating means further including a column of lateral static induction transistors formed in said semiconductor chip and means for shielding said column from said light input, a lateral static induction transistor of the column belonging to a row being repeatedly read out when a plurality of pixels belonging to the same row are successively read out; and differential means formed in said semiconductor chip and connected to said first and second video output lines for producing an output picture signal which is a difference between said dark signal and picture signal and which is directly proportional to an amount of the light input.
Claim 2
Dependent Claim 359 words
A solid state image sensing device comprising: a semiconductor chip upon which a light input is made incident; a plurality of pixels formed in said semiconductor chip in a matrix, each pixel comprising a lateral type static induction transistor, including: a substrate having a high resistance; a semiconductor layer of a first conductivity type applied on a surface of said substrate, said semiconductor layer having a surface; a source region of said first conductivity type formed in the surface of said semiconductor layer; a drain region of said first conductivity type formed in the surface of said semiconductor layer; and gate means, formed in the surface of said semiconductor layer between said source and drain regions, for storing photocarriers generated by a light excitation, and for controlling a source-drain current flowing in parallel with the surface of said semiconductor layer according to an amount of said stored photocarriers multiplied by an amplification factor; scanning means including column and row lines connected to said pixels, horizontal and vertical scanning circuits coupled to said column and row lines, respectively, and a first video output line for scanning said pixels in a XY address mode to generate on said first video output line a picture signal which is inversely proportional to an amount of said light input; dark signal generating means including a second video output line and means for producing on said second video output line a dark signal which is substantially inversely proportional to a dark current generated in said lateral static induction transistor, said dark signal generating means further including a column of lateral static induction transistors formed in said semiconductor chip and means for shielding said column from said light input, a lateral static induction transistor of the column belonging to a row being repeatedly read out when a plurality of pixels belonging to the same row are successively read out; and differential means formed in said semiconductor chip and connected to said first and second video output lines for producing an output picture signal which is a difference between said dark signal and picture signal and which is directly proportional to an amount of the light input.
Claim 3
Dependent Claim 73 words
A device according to claim 1, wherein said differential means comprises first and second output loads connected between a reference potential point and said first and second video output lines, respectively, and a differential amplifier having a positive input terminal connected to a junction between said second video output line and second output load and a negative input terminal connected to a junction between said first video output line and first output load.
Claim 4
Dependent Claim 43 words
A device according to claim 2, wherein said first and second output load comprise first and second output resistors having first ends connected to said first and second video output lines, respectively, and second ends commonly connected to a direct current voltage source.

References Cited (Backward Citations)

US4232331A Cited
US4293877A Cited
US4484223A Cited
US4518863A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-10-12 1991-04-13 1991-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-10-12 1995-04-13 1995-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-10-12 1999-04-13 1999-10-13 $7700.00 Window Closed / Lapsed

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