Synchronous system for parallel data scrambling

Claim 1

An improved synchronous system for parallel data scrambling, of the type comprising a pseudorandom code generator (GC) and a block (S+AP) that performs the synchronizing and scrambling in parallel which, in addition to an initialization signal (INI), receives as inputs a set of parallel input data (DE1, . . . , DEi, . . . , DEn) and codes (C1, . . . , Ci, . . . , Cn) generated by the code generator and produces at its output scrambled data (DA1, . . . , DAi, . . . , DAn) in parallel and wherein the improvement is that each one of a plurality of modulo-2 adders used in feedback loops of the pseudorandom code generator receives only two inputs; and the relationship between the outputs of the pseudorandom code generator in two consecutive time slots of parallel operation tp and tp+1 are determined by an expression: C.sub.tp+1 =T.sup.n (nxn).C.sub.tp where: C tp is an n dimensional vector, equal to a number of bits in parallel that are scrambled, that indicates a value of n pseudorandom codes in the parallel working time slot tp, C tp+1 is an n dimensional vector, that indicates a value of n pseudorandom codes in the time slot tp+1, T n is an n-th power of a transformation matrix T, which is a square matrix (nxn) that represents a transformation matrix of the codes in accordance with the algorithm 1+X 6 +X 7 , whose coefficients, in turn, depend on the value of n.