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US5266819A
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US
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Self-aligned gallium arsenide/aluminum gallium arsenide collector-up heterojunction bipolar transistors capable of microwave applications and method
Assignee: Teledyne Scientific and Imaging LLC
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Filing: 1991-05-13
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Granted: 1993-11-30
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Expires: 2011-05-13
Abstract
Abstract A C-up HBT is made to operate in the microwave/millimeter frequency range by self-aligning the collector uprisers on the base relative to proton damaged emitter regions and the base contacts which minimizes carrier injection into the extrinsic base. The use of about 7-10% indium in the indium gallium arsenide base is sufficient to stop the FREON-12 etch at the base after totally etching through the collector and single self-aligning mask.
Inventors
- 👤 Mau Chung F. Chang
- 👤 Peter M. Asbeck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 13:15
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10P; H10P50/00; H10P50/20; H10P50/24; H10P50/246; H10D62/00; H10D62/80; H10D62/85; H10D62/852
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
57 words
A self-aligned collector-up heterojunction bipolar transistor, comprising in combination: a base of indium gallium arsenide which is P doped; a collector, in contact with the base, of gallium arsenide which is N- doped; an emitter, also in contact with the base, of aluminum gallium arsenide which is N doped; and, contacts to the base, collector and emitter.
Claim 2
Dependent Claim
57 words
A self-aligned collector-up heterojunction bipolar transistor, comprising in combination: a base of indium gallium arsenide which is P doped; a collector, in contact with the base, of gallium arsenide which is N- doped; an emitter, also in contact with the base, of aluminum gallium arsenide which is N doped; and, contacts to the base, collector and emitter.
Claim 3
Dependent Claim
50 words
The transistor of claim 1, wherein: the base is a planar layer; the emitter is a layer beneath the base; the collector comprises spaced apart uprisers supported by the base layer; and, proton damaged regions in the emitter beneath the spacings between collector uprisers to reduce emitter injected base current.
Claim 4
Dependent Claim
56 words
The transistor of claim 2, further comprising: proton damaged regions in the emitter extending to the base wherever the base is not covered by the collector uprisers; and, said base contact is self-aligned to the collector uprisers whereby the spacing between collector contact/base contact is minimized, which provides minimum base series resistance and base emitter capacitance.
Claim 5
Dependent Claim
26 words
The transistor of claim 3, wherein: the collector uprisers are spaced apart fingers; and, the base contacts are spaced apart fingers interlaced with the upriser fingers.
Claim 6
Dependent Claim
52 words
The transistor of claim 1, wherein: the base is a planar layer; the emitter is a layer beneath the base; the collector comprises spaced apart uprisers supported by the base layer; and, proton damage regions in the emitter extending to the base wherever the base is not covered by the collector uprises.
Claim 7
Dependent Claim
15 words
The transistor of claim 5, wherein: said emitter contacts are deployed outboard of the base.
Claim 8
Dependent Claim
16 words
The transistor of claim 6, wherein: said base contacts are deployed in between the collector uprisers.
Claim 9
Dependent Claim
18 words
The transistor of claim 6, wherein: said base contacts are deployed on both sides of each collector upriser.
Claim 10
Dependent Claim
57 words
A self-aligned collector-up heterojunction bipolar transistor, comprising in combination: a base of indium gallium arsenide which is N doped; a collector, in contact with the base, of gallium arsenide which is P doped; an emitter, also in contact with the base, of aluminum gallium arsenide which is P doped; and, contacts to the base, collector and emitter.
Claim 11
Dependent Claim
57 words
A self-aligned collector-up heterojunction bipolar transistor, comprising in combination: a base of indium gallium arsenide which is N doped; a collector, in contact with the base, of gallium arsenide which is P doped; an emitter, also in contact with the base, of aluminum gallium arsenide which is P doped; and, contacts to the base, collector and emitter.
Claim 12
Dependent Claim
50 words
The transistor of claim 9, wherein: the base is a planar layer; the emitter is a layer beneath the base; the collector comprises spaced apart uprisers supported by the base layer; and, proton damaged regions in the emitter beneath the spacings between collector uprisers to reduce emitter injected base current.
Claim 13
Dependent Claim
56 words
The transistor of claim 10, further comprising: proton damaged regions in the emitter extending to the base wherever the base is not covered by the collector uprisers; and, said base contact is self-aligned to the collector uprisers whereby the spacing between collector contact/base contact is minimized, which provides minimum base series resistance and base emitter capacitance.
Claim 14
Dependent Claim
26 words
The transistor of claim 11, wherein: the collector uprisers are spaced apart fingers; and, the base contacts are spaced apart fingers interlaced with the upriser fingers.
Claim 15
Dependent Claim
52 words
The transistor of claim 9, wherein: the base is a planar layer; the emitter is a layer beneath the base; the collector comprises spaced apart uprisers supported by the base layer; and, proton damage regions in the emitter extending to the base wherever the base is not covered by the collector uprisers.
Claim 16
Dependent Claim
15 words
The transistor of claim 13, wherein: said emitter contacts are deployed outboard of the base.
Claim 17
Dependent Claim
16 words
The transistor of claim 14, wherein: said base contacts are deployed in between the collector uprisers.
Claim 18
Dependent Claim
18 words
The transistor of claim 14, wherein: said base contacts are deployed on both sides of each collector upriser.
References Cited (Backward Citations)
JPS6415063A
Cited
US4939562A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-11-29 | 1997-05-31 | 1997-11-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-29 | 2001-05-31 | 2001-11-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-29 | 2005-05-31 | 2005-11-30 | $7700.00 | Window Closed / Lapsed |