US5264379A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making a hetero-junction bipolar transistor
Assignee: Sumitomo Electric Industries Ltd
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Filing: 1993-02-22
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Granted: 1993-11-23
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Expires: 2013-02-22
Abstract
Abstract A method of manufacturing a heterojunction bipolar transistor is disclosed. On a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an emitter layer of a second semiconductor is formed which contains as a constituent element at least one of gallium and arsenic and which has a band gap larger that of the first semiconductor. Predetermined regions of the emitter layer and an upper portion of the base layer are removed to form a mesa structure. Then, a surface of a junction region of the base layer and the emitter layer of the formed mesa structure is treated using a phosphate etchant and a sulfur or sulfide passivating agent. After the surface treatment, the surface of the junction is covered with an insulating film.
Inventors
- 👤 Shinichi Shikata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:14
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10D; H10D10/00; H10D10/01; H10D10/021; H10D10/80; H10D10/821; H10W; H10W74/00; H10W74/40; H10D62/00; H10D62/80; H10D62/85; H10P14/69; H10P14/694; H10P14/6943; H10P14/69433; Y; Y10; Y10S; Y10S148/00; Y10S148/011; Y10S148/064; Y10S148/072
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
152 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an emitter layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the emitter layer and an upper portion of the base layer to form a mesa structure; slightly etching a surface of a junction region of the base layer and the emitter layer, which is exposed on an edge of the formed mesa structure, using a phosphate-based etchant; treating said surface of said junction region of the base layer and the emitter layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 2
Independent Claim
152 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an emitter layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the emitter layer and an upper portion of the base layer to form a mesa structure; slightly etching a surface of a junction region of the base layer and the emitter layer, which is exposed on an edge of the formed mesa structure, using a phosphate-based etchant; treating said surface of said junction region of the base layer and the emitter layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 3
Dependent Claim
28 words
A method according to claim 1, wherein the step of covering the surface includes the step of covering the surface of the junction region by an ECR-CVD method.
Claim 4
Dependent Claim
42 words
A method according to claim 1, wherein the step of covering the junction region includes the step of covering the surface of the junction region with an SiN film by the ECR-CVD method and thereafter performing annealing at 380° to 520° C.
Claim 5
Dependent Claim
32 words
A method according to claim 1, wherein the first and second semiconductors contain, as a constituent element, at least one element selected from the group consisting of aluminum, indium, phosphorus, and antimony.
Claim 6
Independent Claim
152 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, a collector layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the collector layer and an upper portion of the base layer to form a mesa structure; slightly etching a surface of a junction region of the base layer and the collector layer, which is exposed on an edge of the formed mesa structure, using a phosphate-based etchant; treating said surface of said junction region of the base layer and the collector layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 7
Independent Claim
152 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, a collector layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the collector layer and an upper portion of the base layer to form a mesa structure; slightly etching a surface of a junction region of the base layer and the collector layer, which is exposed on an edge of the formed mesa structure, using a phosphate-based etchant; treating said surface of said junction region of the base layer and the collector layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 8
Dependent Claim
28 words
A method according to claim 5, wherein the step of covering the surface includes the step of covering the surface of the junction region by an ECR-CVD method.
Claim 9
Dependent Claim
32 words
A method according to claim 5, wherein the first and second semiconductors contain, as a constituent element, at least one element selected from the group consisting of aluminum, indium, phosphorus, and antimony.
Claim 10
Dependent Claim
42 words
A method according to claim 5, wherein the step of covering the junction region includes the step of covering the surface of the junction region with an SiN film by the ECR-CVD method and thereafter performing annealing at 380° to 520° C.
Claim 11
Independent Claim
125 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an emitter layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the emitter layer and an upper portion of the base layer to form a mesa structure using a phosphate-based etchant; treating a surface of a junction region of the base layer and the emitter layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 12
Independent Claim
125 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, an emitter layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the emitter layer and an upper portion of the base layer to form a mesa structure using a phosphate-based etchant; treating a surface of a junction region of the base layer and the emitter layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 13
Independent Claim
125 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, a collector layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the collector layer and an upper portion of the base layer to form a mesa structure using a phosphate-based etchant; treating a surface of a junction region of the base layer and the collector layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
Claim 14
Independent Claim
125 words
A method of manufacturing a heterojunction bipolar transistor, including the steps of: forming, on a base layer of a first semiconductor which contains at least one of gallium and arsenic as a constituent element, a collector layer of a second semiconductor which has at least one of gallium and arsenic as a constituent element and which has a band gap larger than that of the first semiconductor; removing predetermined regions of the collector layer and an upper portion of the base layer to form a mesa structure using a phosphate-based etchant; treating a surface of a junction region of the base layer and the collector layer using a sulfur or sulfide passivating agent; and covering the surface of the junction region with an insulating film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-11-22 | 1997-05-24 | 1997-11-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-22 | 2001-05-24 | 2001-11-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-22 | 2005-05-24 | 2005-11-23 | $7700.00 | Window Closed / Lapsed |